From patchwork Mon Jul 14 14:33:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 369650 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 74A21140097 for ; Tue, 15 Jul 2014 00:34:56 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755936AbaGNOez (ORCPT ); Mon, 14 Jul 2014 10:34:55 -0400 Received: from mail-ig0-f177.google.com ([209.85.213.177]:33769 "EHLO mail-ig0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755706AbaGNOeI (ORCPT ); Mon, 14 Jul 2014 10:34:08 -0400 Received: by mail-ig0-f177.google.com with SMTP id hn18so1730838igb.4 for ; Mon, 14 Jul 2014 07:34:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1NX1/DT1r9LX0IGbfZQ/XyqEru7YUbgeQJ6l1ELE3CY=; b=mlYiwuZJH+znUUGAVjp13VLFKYV6OuUPAc4WdptSgCBezsPfPhLB92Tyr+H6H21osY 7hHoPyOZqztw4MdpRTsymqMv+QwVtZVJstvxHTkA0h6wfAb+lcGK5LUB1QJlVL3nBroz WRfRe+qM2tqp0f9Ad15GUn7B2GLcYQDijOmGdeu7kyvdt1UQYxJ6wmnxGaIgjYP7OI6y WSpJNJsqZktjoQcgqgYCz6BDp5iuFdKo1jvL2cxgohK2V4KsgFwAPmtDgakw2/Uis8L/ cqHx5u1aONFyelQitLLnI87uLaCs9AQq/6MiA1ZhaoSbxrq34PC0InR6Bzb0tU0voUo2 D5Og== X-Gm-Message-State: ALoCoQnfPPRVFMTMPYKhz8d5dTtE67v3ZnUgimIMPd+KkuZ3rrxm/IqKV5VvAua+dDI2Sw2a9xN4 X-Received: by 10.50.137.73 with SMTP id qg9mr25786181igb.19.1405348447052; Mon, 14 Jul 2014 07:34:07 -0700 (PDT) Received: from localhost.localdomain (host109-148-237-85.range109-148.btcentralplus.com. [109.148.237.85]) by mx.google.com with ESMTPSA id q11sm25317390igr.7.2014.07.14.07.34.04 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Jul 2014 07:34:06 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com Subject: [PATCH v2 09/11] pwm: sti: Ensure same period values for all channels Date: Mon, 14 Jul 2014 15:33:30 +0100 Message-Id: <1405348412-7352-10-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> References: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Ajit Pal Singh ST PWM IP shares the same clock prescaler across all the PWM channels. Hence configuration requests which change the period will affect all the channels. Do not allow period changes which will stomp period settings of the already configured channels. Signed-off-by: Ajit Pal Singh Signed-off-by: Lee Jones --- drivers/pwm/pwm-sti.c | 140 ++++++++++++++++++++++++++++++++++---------------- 1 file changed, 96 insertions(+), 44 deletions(-) diff --git a/drivers/pwm/pwm-sti.c b/drivers/pwm/pwm-sti.c index 21d97bc2..0fdf4b4 100644 --- a/drivers/pwm/pwm-sti.c +++ b/drivers/pwm/pwm-sti.c @@ -58,6 +58,7 @@ struct sti_pwm_chip { struct regmap_field *pwm_int_en; unsigned long *pwm_periods; struct pwm_chip chip; + struct pwm_device *cur; void __iomem *mmio; }; @@ -99,6 +100,24 @@ static void sti_pwm_calc_periods(struct sti_pwm_chip *pc) } } +/* Calculate the number of PWM devices configured with a period. */ +unsigned int sti_pwm_count_configured(struct pwm_chip *chip) +{ + struct pwm_device *pwm; + unsigned int ncfg = 0; + unsigned int i; + + for (i = 0; i < chip->npwm; i++) { + pwm = &chip->pwms[i]; + if (test_bit(PWMF_REQUESTED, &pwm->flags)) { + if (pwm_get_period(pwm)) + ncfg++; + } + } + + return ncfg; +} + static int sti_pwm_cmp_periods(const void *key, const void *elt) { unsigned long i = *(unsigned long *)key; @@ -124,57 +143,90 @@ static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, { struct sti_pwm_chip *pc = to_sti_pwmchip(chip); struct sti_pwm_compat_data *cdata = pc->cdata; + struct pwm_device *cur = pc->cur; struct device *dev = pc->dev; - unsigned int prescale, pwmvalx; + unsigned int prescale = 0, pwmvalx; unsigned long *found; int ret; - - /* - * Search for matching period value. The corresponding index is our - * prescale value + unsigned int ncfg; + bool period_same = false; + + ncfg = sti_pwm_count_configured(chip); + if (ncfg) + period_same = (period_ns == pwm_get_period(cur)); + + /* Allow configuration changes if one of the + * following conditions satisfy. + * 1. No channels have been configured. + * 2. Only one channel has been configured and the new request + * is for the same channel. + * 3. Only one channel has been configured and the new request is + * for a new channel and period of the new channel is same as + * the current configured period. + * 4. More than one channels are configured and period of the new + * requestis the same as the current period. */ - found = bsearch(&period_ns, &pc->pwm_periods[0], - cdata->max_prescale + 1, sizeof(unsigned long), - sti_pwm_cmp_periods); - if (!found) { - dev_err(dev, "failed to find matching period\n"); + if (!ncfg || + ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) || + ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) || + ((ncfg > 1) && period_same)) { + /* Enable clock before writing to PWM registers. */ + ret = clk_enable(pc->clk); + if (ret) + return ret; + + if (!period_same) { + /* + * Search for matching period value. + * The corresponding index is our prescale value. + */ + found = bsearch(&period_ns, &pc->pwm_periods[0], + cdata->max_prescale + 1, + sizeof(unsigned long), + sti_pwm_cmp_periods); + if (!found) { + dev_err(dev, + "failed to find matching period\n"); + ret = -EINVAL; + goto clk_dis; + } + prescale = found - &pc->pwm_periods[0]; + + ret = + regmap_field_write(pc->prescale_low, + prescale & PWM_PRESCALE_LOW_MASK); + if (ret) + goto clk_dis; + + ret = + regmap_field_write(pc->prescale_high, + (prescale & PWM_PRESCALE_HIGH_MASK) >> 4); + if (ret) + goto clk_dis; + } + + /* + * When PWMVal == 0, PWM pulse = 1 local clock cycle. + * When PWMVal == max_pwm_count, + * PWM pulse = (max_pwm_count + 1) local cycles, + * that is continuous pulse: signal never goes low. + */ + pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns; + + ret = regmap_write(pc->regmap, STI_DS_REG(pwm->hwpwm), pwmvalx); + if (ret) + goto clk_dis; + + ret = regmap_field_write(pc->pwm_int_en, 0); + + pc->cur = pwm; + + dev_dbg(dev, "prescale:%u, period:%lu, duty:%i, pwmvalx:%u\n", + prescale, period_ns, duty_ns, pwmvalx); + } else { return -EINVAL; } - prescale = found - &pc->pwm_periods[0]; - - /* - * When PWMVal == 0, PWM pulse = 1 local clock cycle. - * When PWMVal == max_pwm_count, - * PWM pulse = (max_pwm_count + 1) local cycles, - * that is continuous pulse: signal never goes low. - */ - pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns; - - dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n", - prescale, period_ns, duty_ns, pwmvalx); - - /* Enable clock before writing to PWM registers */ - ret = clk_enable(pc->clk); - if (ret) - return ret; - - ret = regmap_field_write(pc->prescale_low, - prescale & PWM_PRESCALE_LOW_MASK); - if (ret) - goto clk_dis; - - ret = regmap_field_write(pc->prescale_high, - (prescale & PWM_PRESCALE_HIGH_MASK) >> 4); - if (ret) - goto clk_dis; - - ret = regmap_write(pc->regmap, STI_PWMVAL(pwm->hwpwm), pwmvalx); - if (ret) - goto clk_dis; - - ret = regmap_field_write(pc->pwm_int_en, 0); - clk_dis: clk_disable(pc->clk); return ret;