diff mbox

[2/3] pwm: rockchip: document device tree bindings

Message ID 1399504115-16257-3-git-send-email-b.galvani@gmail.com
State Superseded
Headers show

Commit Message

Beniamino Galvani May 7, 2014, 11:08 p.m. UTC
This adds binding documentation for Rockchip SoC PWM driver.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 .../devicetree/bindings/pwm/pwm-rockchip.txt          |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt

Comments

Thierry Reding June 17, 2014, 9:45 p.m. UTC | #1
On Thu, May 08, 2014 at 01:08:34AM +0200, Beniamino Galvani wrote:
[...]
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> new file mode 100644
> index 0000000..35deba4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> @@ -0,0 +1,17 @@
> +Rockchip PWM controller
> +
> +Required properties:
> + - compatible: should be "rockchip,rk2928-pwm"
> + - reg: physical base address and length of the controller's registers
> + - clocks: phandle and clock specifier of the PWM reference clock
> + - #pwm-cells: should be 2. See pwm.txt in this directory for a
> +   description of the cell format

Nit: this sentence should have a full stop at the end.

Thierry
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
new file mode 100644
index 0000000..35deba4
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
@@ -0,0 +1,17 @@ 
+Rockchip PWM controller
+
+Required properties:
+ - compatible: should be "rockchip,rk2928-pwm"
+ - reg: physical base address and length of the controller's registers
+ - clocks: phandle and clock specifier of the PWM reference clock
+ - #pwm-cells: should be 2. See pwm.txt in this directory for a
+   description of the cell format
+
+Example:
+
+	pwm0: pwm@20030000 {
+		compatible = "rockchip,rk2928-pwm";
+		reg = <0x20030000 0x10>;
+		clocks = <&cru PCLK_PWM01>;
+		#pwm-cells = <2>;
+	};