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[PATCHv2,4/4] pwm: ftm-pwm: Add big-endian support

Message ID 1398742429-10399-5-git-send-email-Li.Xiubo@freescale.com
State Superseded
Headers show

Commit Message

Xiubo Li April 29, 2014, 3:33 a.m. UTC 
This add the big endianness support for the FTM PWM driver, which
will run on LS1 SoC.

Now for the following scenarios:
 SoC     |  CPU   | FTM-PWM | 'big-endian' property is needed?
---------|--------|---------|---------------------------------
Vybird   |  LE    |   LE    |     No
 LS1     |  LE    |   BE    |     Yes
 LS2     |  LE    |   LE    |     No

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
 drivers/pwm/pwm-fsl-ftm.c | 6 ++++++
 1 file changed, 6 insertions(+)
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Patch

diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c
index 5d999c1..9a82741 100644
--- a/drivers/pwm/pwm-fsl-ftm.c
+++ b/drivers/pwm/pwm-fsl-ftm.c
@@ -409,6 +409,7 @@  static struct regmap_config fsl_pwm_regmap_config = {
 
 static int fsl_pwm_probe(struct platform_device *pdev)
 {
+	struct device_node *np = pdev->dev.of_node;
 	struct fsl_pwm_chip *fpc;
 	struct resource *res;
 	void __iomem *base;
@@ -422,6 +423,11 @@  static int fsl_pwm_probe(struct platform_device *pdev)
 
 	fpc->chip.dev = &pdev->dev;
 
+	if (of_property_read_bool(np, "big-endian"))
+		fsl_pwm_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
+	else
+		fsl_pwm_regmap_config.val_format_endian = REGMAP_ENDIAN_NATIVE;
+
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(base))