From patchwork Tue Apr 29 03:33:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiubo Li X-Patchwork-Id: 343662 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A946914008D for ; Tue, 29 Apr 2014 14:19:23 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753886AbaD2ESx (ORCPT ); Tue, 29 Apr 2014 00:18:53 -0400 Received: from mail-bn1blp0184.outbound.protection.outlook.com ([207.46.163.184]:58965 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754372AbaD2ESX (ORCPT ); Tue, 29 Apr 2014 00:18:23 -0400 Received: from CH1PR03CA002.namprd03.prod.outlook.com (10.255.156.147) by BL2PR03MB499.namprd03.prod.outlook.com (10.141.93.147) with Microsoft SMTP Server (TLS) id 15.0.921.12; Tue, 29 Apr 2014 04:18:21 +0000 Received: from BL2FFO11FD008.protection.gbl (10.255.156.132) by CH1PR03CA002.outlook.office365.com (10.255.156.147) with Microsoft SMTP Server (TLS) id 15.0.929.12 via Frontend Transport; Tue, 29 Apr 2014 04:18:20 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.1) by BL2FFO11FD008.mail.protection.outlook.com (10.173.161.4) with Microsoft SMTP Server (TLS) id 15.0.929.8 via Frontend Transport; Tue, 29 Apr 2014 04:18:20 +0000 Received: from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s3T4ID3X025042; Mon, 28 Apr 2014 21:18:17 -0700 From: Xiubo Li To: , CC: , Xiubo Li Subject: [PATCHv2 2/4] pwm: ftm-pwm: Clean up the code. Date: Tue, 29 Apr 2014 11:33:47 +0800 Message-ID: <1398742429-10399-3-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1398742429-10399-1-git-send-email-Li.Xiubo@freescale.com> References: <1398742429-10399-1-git-send-email-Li.Xiubo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.1; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(428001)(189002)(199002)(50466002)(74502001)(36756003)(92566001)(46102001)(83322001)(77156001)(6806004)(85852003)(83072002)(44976005)(47776003)(19580405001)(101416001)(48376002)(19580395003)(81342001)(20776003)(92726001)(80022001)(87936001)(50986999)(50226001)(80976001)(77982001)(4396001)(81542001)(89996001)(77096999)(31966008)(86362001)(88136002)(76482001)(99396002)(93916002)(62966002)(87286001)(79102001)(76176999); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2PR03MB499; H:tx30smr01.am.freescale.net; FPR:6F7570EF.1EBD62E.3FF698BC.99960AA0.201C6; MLV:sfv; PTR:gate-tx3.freescale.com; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0196A226D1 Received-SPF: None (: freescale.com does not designate permitted sender hosts) X-OriginatorOrg: freescale.com Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This patch intends to prepare for converting to direct regmap API usage. Signed-off-by: Xiubo Li --- drivers/pwm/pwm-fsl-ftm.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index 420169e..4a4ad58 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -21,11 +21,10 @@ #include #define FTM_SC 0x00 -#define FTM_SC_CLK_MASK 0x3 -#define FTM_SC_CLK_SHIFT 3 -#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_SHIFT) +#define FTM_SC_CLK_MASK_SHIFT 3 +#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) +#define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT) #define FTM_SC_PS_MASK 0x7 -#define FTM_SC_PS_SHIFT 0 #define FTM_CNT 0x04 #define FTM_MOD 0x08 @@ -258,7 +257,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, } val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_PS_MASK << FTM_SC_PS_SHIFT); + val &= ~FTM_SC_PS_MASK; val |= fpc->clk_ps; writel(val, fpc->base + FTM_SC); writel(period - 1, fpc->base + FTM_MOD); @@ -305,7 +304,7 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip *fpc) /* select counter clock source */ val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT); + val &= ~FTM_SC_CLK_MASK; val |= FTM_SC_CLK(fpc->cnt_select); writel(val, fpc->base + FTM_SC); @@ -357,7 +356,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip *fpc) /* no users left, disable PWM counter clock */ val = readl(fpc->base + FTM_SC); - val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT); + val &= ~FTM_SC_CLK_MASK; writel(val, fpc->base + FTM_SC); clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);