| Message ID | 20240501083242.773305-1-qiujingbao.dlmu@gmail.com |
|---|---|
| Headers | show |
| Series | riscv: pwm: sophgo: add pwm support for CV1800 | expand |
Hi, Jingbao, This patchset should also be sent to the linux-riscv mailinglist. On 2024/5/1 16:32, Jingbao Qiu wrote: > The Sophgo CV1800 chip provides a set of four independent > PWM channel outputs. > This series adds PWM controller support for Sophgo cv1800. > > Changes since v6: > - add detailed Limitations > - using BIT(n) instead BIT(0) << n > - use 0 instead of disable macro > - modify OE judgment criteria > - add devm_regmap_init_mmio error message > - delete unused variable > > v6: https://lore.kernel.org/all/20240406063413.3334639-1-qiujingbao.dlmu@gmail.com/ > > Changes since v5: > - delete the OE function because we plan to use the counter subsystem > instead of capture, so there is no need to reuse this code. > - fix set polarity reverse error. > > v5: https://lore.kernel.org/all/20240314100131.323540-1-qiujingbao.dlmu@gmail.com/ > > Changes since v4: > - drop filename > - fix macro > - optimize cv1800_pwm_set_polarity() > - optimize cv1800_pwm_set_oe() > - add comment for cv1800_pwm_set_oe() > - use ticks replace tem > - fix duty_cycle larger than period_val > - use devm_clk_rate_exclusive_get() replace > clk_rate_exclusive_get() > - map linux polarity to register polarity > > v4: https://lore.kernel.org/all/20240304085933.1246964-1-qiujingbao.dlmu@gmail.com/ > > datasheet Link: https://github.com/milkv-duo/duo-files/blob/main/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf > page 614 > > Changes since v3: > - use macro instead of npwm number > - add support for polarity feature > - add support for Output-Enable/OE feature > > v3: https://lore.kernel.org/all/20240223082014.109385-1-qiujingbao.dlmu@gmail.com/ > > Changes since v2: > - use 0x08 instead of macro > - split if statements based on conditions > - in order to round up, first calculate the > number of high-level cycles, then subtract > it from the PERIOD to obtain the number of HLPERIOD > - use new pwmchip_alloc() API instead of old style > > v2: https://lore.kernel.org/all/20240212121729.1086718-1-qiujingbao.dlmu@gmail.com/ > > Changes since v1: > - drop full stop from subject > - re-order maintainers and description > - pass checkpatch.pl --strict > - fix naming errors > - add "Limitations" section > - use a driver specific prefix for all defines > - using bool instead u32 in cv1800_pwm_enable > - check and set state->polarity > - use mul_u64_u64_div_u64 > - use clk_rate_exclusive_get(), balance with clk_rate_exclusive_put() > - using macro definitions instead of shift operations > - remove shift operation on 0 > - use priv replace cv_pwm > - hardcode npwm > - set atomic to true > - remove MODULE_ALIAS > > v1: https://lore.kernel.org/all/20240207055856.672184-1-qiujingbao.dlmu@gmail.com/ > > Jingbao Qiu (2): > dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC > pwm: sophgo: add pwm support for Sophgo CV1800 SoC > > .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++ > drivers/pwm/Kconfig | 10 + > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-cv1800.c | 293 ++++++++++++++++++ > 4 files changed, 349 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml > create mode 100644 drivers/pwm/pwm-cv1800.c > > > base-commit: 32c44e1fa921aebf8a5ef9f778534a30aab39313
On Fri, May 3, 2024 at 9:47 AM Chen Wang <unicorn_wang@outlook.com> wrote: > > Hi, Jingbao, > > This patchset should also be sent to the linux-riscv mailinglist. I will do that. > > On 2024/5/1 16:32, Jingbao Qiu wrote: > > The Sophgo CV1800 chip provides a set of four independent > > PWM channel outputs. > > This series adds PWM controller support for Sophgo cv1800. > > > > Changes since v6: > > - add detailed Limitations > > - using BIT(n) instead BIT(0) << n > > - use 0 instead of disable macro > > - modify OE judgment criteria > > - add devm_regmap_init_mmio error message > > - delete unused variable > > > > v6: https://lore.kernel.org/all/20240406063413.3334639-1-qiujingbao.dlmu@gmail.com/ > > > > Changes since v5: > > - delete the OE function because we plan to use the counter subsystem > > instead of capture, so there is no need to reuse this code. > > - fix set polarity reverse error. > > > > v5: https://lore.kernel.org/all/20240314100131.323540-1-qiujingbao.dlmu@gmail.com/ > > > > Changes since v4: > > - drop filename > > - fix macro > > - optimize cv1800_pwm_set_polarity() > > - optimize cv1800_pwm_set_oe() > > - add comment for cv1800_pwm_set_oe() > > - use ticks replace tem > > - fix duty_cycle larger than period_val > > - use devm_clk_rate_exclusive_get() replace > > clk_rate_exclusive_get() > > - map linux polarity to register polarity > > > > v4: https://lore.kernel.org/all/20240304085933.1246964-1-qiujingbao.dlmu@gmail.com/ > > > > datasheet Link: https://github.com/milkv-duo/duo-files/blob/main/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf > > page 614 > > > > Changes since v3: > > - use macro instead of npwm number > > - add support for polarity feature > > - add support for Output-Enable/OE feature > > > > v3: https://lore.kernel.org/all/20240223082014.109385-1-qiujingbao.dlmu@gmail.com/ > > > > Changes since v2: > > - use 0x08 instead of macro > > - split if statements based on conditions > > - in order to round up, first calculate the > > number of high-level cycles, then subtract > > it from the PERIOD to obtain the number of HLPERIOD > > - use new pwmchip_alloc() API instead of old style > > > > v2: https://lore.kernel.org/all/20240212121729.1086718-1-qiujingbao.dlmu@gmail.com/ > > > > Changes since v1: > > - drop full stop from subject > > - re-order maintainers and description > > - pass checkpatch.pl --strict > > - fix naming errors > > - add "Limitations" section > > - use a driver specific prefix for all defines > > - using bool instead u32 in cv1800_pwm_enable > > - check and set state->polarity > > - use mul_u64_u64_div_u64 > > - use clk_rate_exclusive_get(), balance with clk_rate_exclusive_put() > > - using macro definitions instead of shift operations > > - remove shift operation on 0 > > - use priv replace cv_pwm > > - hardcode npwm > > - set atomic to true > > - remove MODULE_ALIAS > > > > v1: https://lore.kernel.org/all/20240207055856.672184-1-qiujingbao.dlmu@gmail.com/ > > > > Jingbao Qiu (2): > > dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC > > pwm: sophgo: add pwm support for Sophgo CV1800 SoC > > > > .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++ > > drivers/pwm/Kconfig | 10 + > > drivers/pwm/Makefile | 1 + > > drivers/pwm/pwm-cv1800.c | 293 ++++++++++++++++++ > > 4 files changed, 349 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml > > create mode 100644 drivers/pwm/pwm-cv1800.c > > > > > > base-commit: 32c44e1fa921aebf8a5ef9f778534a30aab39313 Best regards Jingbao Qiu