diff mbox series

PCI: Annotate pci_cache_line_size variables as __ro_after_init

Message ID ccb214ae-4c51-46b0-85f0-dba7ebe77743@gmail.com
State New
Headers show
Series PCI: Annotate pci_cache_line_size variables as __ro_after_init | expand

Commit Message

Heiner Kallweit April 13, 2024, 9:05 p.m. UTC
Annotate both variables as __ro_after_init, enforcing that they can't
be changed after the init phase.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/pci/pci.c   | 4 ++--
 include/linux/pci.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Bjorn Helgaas April 17, 2024, 3:50 p.m. UTC | #1
On Sat, Apr 13, 2024 at 11:05:52PM +0200, Heiner Kallweit wrote:
> Annotate both variables as __ro_after_init, enforcing that they can't
> be changed after the init phase.
> 
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
> ---
>  drivers/pci/pci.c   | 4 ++--
>  include/linux/pci.h | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 5f8edba78..e7ac4474b 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
>   * the dfl or actual value as it sees fit.  Don't forget this is
>   * measured in 32-bit words, not bytes.
>   */
> -u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
> -u8 pci_cache_line_size;
> +u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
> +u8 pci_cache_line_size __ro_after_init;
>  
>  /*
>   * If we set up a device for bus mastering, we need to check the latency
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 69b10f2fb..cf63be0c9 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -2334,8 +2334,8 @@ extern int pci_pci_problems;
>  
>  extern unsigned long pci_cardbus_io_size;
>  extern unsigned long pci_cardbus_mem_size;
> -extern u8 pci_dfl_cache_line_size;
> -extern u8 pci_cache_line_size;
> +extern u8 pci_dfl_cache_line_size __ro_after_init;
> +extern u8 pci_cache_line_size __ro_after_init;

Is __ro_after_init required on the declaration, too?  I see a few uses
in .h files, but not very many, and I would think it would be a linker
thing that applies to the definition, where space is allocated.

>  /* Architecture-specific versions may override these (weak) */
>  void pcibios_disable_device(struct pci_dev *dev);
> -- 
> 2.44.0
>
Heiner Kallweit April 18, 2024, 6:25 p.m. UTC | #2
On 17.04.2024 17:50, Bjorn Helgaas wrote:
> On Sat, Apr 13, 2024 at 11:05:52PM +0200, Heiner Kallweit wrote:
>> Annotate both variables as __ro_after_init, enforcing that they can't
>> be changed after the init phase.
>>
>> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
>> ---
>>  drivers/pci/pci.c   | 4 ++--
>>  include/linux/pci.h | 4 ++--
>>  2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>> index 5f8edba78..e7ac4474b 100644
>> --- a/drivers/pci/pci.c
>> +++ b/drivers/pci/pci.c
>> @@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
>>   * the dfl or actual value as it sees fit.  Don't forget this is
>>   * measured in 32-bit words, not bytes.
>>   */
>> -u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
>> -u8 pci_cache_line_size;
>> +u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
>> +u8 pci_cache_line_size __ro_after_init;
>>  
>>  /*
>>   * If we set up a device for bus mastering, we need to check the latency
>> diff --git a/include/linux/pci.h b/include/linux/pci.h
>> index 69b10f2fb..cf63be0c9 100644
>> --- a/include/linux/pci.h
>> +++ b/include/linux/pci.h
>> @@ -2334,8 +2334,8 @@ extern int pci_pci_problems;
>>  
>>  extern unsigned long pci_cardbus_io_size;
>>  extern unsigned long pci_cardbus_mem_size;
>> -extern u8 pci_dfl_cache_line_size;
>> -extern u8 pci_cache_line_size;
>> +extern u8 pci_dfl_cache_line_size __ro_after_init;
>> +extern u8 pci_cache_line_size __ro_after_init;
> 
> Is __ro_after_init required on the declaration, too?  I see a few uses
> in .h files, but not very many, and I would think it would be a linker
> thing that applies to the definition, where space is allocated.
> 
You're right, it's not needed on the declaration. I'll submit a v2.

>>  /* Architecture-specific versions may override these (weak) */
>>  void pcibios_disable_device(struct pci_dev *dev);
>> -- 
>> 2.44.0
>>
diff mbox series

Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 5f8edba78..e7ac4474b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -142,8 +142,8 @@  enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
  * the dfl or actual value as it sees fit.  Don't forget this is
  * measured in 32-bit words, not bytes.
  */
-u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
-u8 pci_cache_line_size;
+u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
+u8 pci_cache_line_size __ro_after_init;
 
 /*
  * If we set up a device for bus mastering, we need to check the latency
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 69b10f2fb..cf63be0c9 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -2334,8 +2334,8 @@  extern int pci_pci_problems;
 
 extern unsigned long pci_cardbus_io_size;
 extern unsigned long pci_cardbus_mem_size;
-extern u8 pci_dfl_cache_line_size;
-extern u8 pci_cache_line_size;
+extern u8 pci_dfl_cache_line_size __ro_after_init;
+extern u8 pci_cache_line_size __ro_after_init;
 
 /* Architecture-specific versions may override these (weak) */
 void pcibios_disable_device(struct pci_dev *dev);