From patchwork Sat Feb 11 07:13:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 726824 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vL32P5KGXz9s6s for ; Sat, 11 Feb 2017 18:13:49 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="rMABKXQ5"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752389AbdBKHNp (ORCPT ); Sat, 11 Feb 2017 02:13:45 -0500 Received: from mail-vk0-f65.google.com ([209.85.213.65]:36752 "EHLO mail-vk0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750753AbdBKHNo (ORCPT ); Sat, 11 Feb 2017 02:13:44 -0500 Received: by mail-vk0-f65.google.com with SMTP id n125so4207170vke.3; Fri, 10 Feb 2017 23:13:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=KJt52BJIJhhzZ791qIwYpuFDUn1azIBvbLV5xExiNQw=; b=rMABKXQ5awB/qw+UG4csDtfTAyPR3Qi66dL0F0in6QIkKOGqAEq10xDijDI0bdOvDA 3tblprHjdB+kkyl3TrZNOk3yGmKWnFBNSi1jjEXPONWhTZtsYXwshi2+UwSs7tOAuBeU PCNZi4C+0yBw2GsRuEJyaDarpHW5rbhluOyzS3SRIb/bMaUqdzZjpjTrjRdR+PquoEVs xzWlXgMi6H1tsT2pfro6v0XBPf69R5PuIh2S6R8Y2/Q48ron5k7b9ilMK27Uvyv3/fdC FaATLIlT0iSIpyK2Fxtk4fJXAAkmz2XpDCcBKm5hW0eMySHVb0iRFhYSNpJOSRdHLZaK o4+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=KJt52BJIJhhzZ791qIwYpuFDUn1azIBvbLV5xExiNQw=; b=fnsu8b1Otq0985uENFdrc1LEgh4Dowctrhbat0wJ9y1VvNTmGEJxnW15/3tsdL0QtS lc74xUZ6X7gbtPgwfRiF/Suf2sYR/13jQpSoFcPAswICN3O0I4xS3zKju5uOMNwAPpON +VhvR+2ALVnIV20n0cmab1fX4+O/rzQafuQEfLNrF+dexkT3xdoOwpylBBRwTAVIowFv cSPSpwZamb5pUF/s6i0IHyFu20z1E43qwPlMVZSMLmQt1nKQWHE9da8csCS+MO0QCveW CSmrcLBbd5AaIuGTM5DC0eitk8I85/PIFaPdh1XplV54HwybY2dGtjk2XLPGgM4/UlKS uwTQ== X-Gm-Message-State: AMke39ky9dhOrUjOnwHA0fnJQJFtT/P7Q/GEEAXiZiDmt5v2faLkyNV5fCMwOO3HA/sv+Zz/ysVpUUZuWFBccw== X-Received: by 10.31.52.195 with SMTP id b186mr5024977vka.13.1486797217874; Fri, 10 Feb 2017 23:13:37 -0800 (PST) MIME-Version: 1.0 Received: by 10.103.37.199 with HTTP; Fri, 10 Feb 2017 23:13:37 -0800 (PST) In-Reply-To: References: <20170208192054.GA31395@bhelgaas-glaptop.roam.corp.google.com> <20170208192256.GB31395@bhelgaas-glaptop.roam.corp.google.com> <20170209040648.GA1304@wunner.de> <20170209150950.GA11905@bhelgaas-glaptop.roam.corp.google.com> <20170209201154.GA22458@bhelgaas-glaptop.roam.corp.google.com> From: Yinghai Lu Date: Fri, 10 Feb 2017 23:13:37 -0800 X-Google-Sender-Auth: 7GDE1UtLkz_EIMkAh_wSiE7vlis Message-ID: Subject: Re: [GIT PULL] PCI fixes for v4.10 To: Bjorn Helgaas Cc: Lukas Wunner , Linus Torvalds , "linux-pci@vger.kernel.org" , Linux Kernel Mailing List , Bart Van Assche , Christoph Hellwig , "Rafael J. Wysocki" , Mika Westerberg , Ashok Raj , Keith Busch Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, Feb 10, 2017 at 6:39 PM, Yinghai Lu wrote: > Ashok, > > Can ask your QA guys check only attached patch and commit 68db9bc ? more clean patches: split that into two small patches. Thanks Yinghai Subject:[PATCH v2] PCI, pciechp: power on/off slots after change to D0 Found power on via /sys has problem. sca05-0a81fd7f:~ # echo 1 > /sys/bus/pci/slots/7/power [ 300.949937] pci_hotplug: power_write_file: power = 1 [ 300.955502] pciehp 0000:73:00.0:pcie004: pciehp_get_power_status: SLOTCTRL a8 value read 17f1 [ 300.982557] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 from Slot Status [ 300.991171] pciehp 0000:73:00.0:pcie004: pciehp_power_on_slot: SLOTCTRL a8 write cmd 0 [ 301.000033] pciehp 0000:73:00.0:pcie004: pciehp_green_led_blink: SLOTCTRL a8 write cmd 200 [ 301.009274] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 from Slot Status [ 301.662172] pciehp 0000:73:00.0:pcie004: pciehp_check_link_active: lnk_status = f083 [ 301.670827] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0108 from Slot Status [ 301.679376] pciehp 0000:73:00.0:pcie004: Slot(7): Link Up [ 301.685463] pciehp 0000:73:00.0:pcie004: Slot(7): Link Up event ignored; already powering on [ 301.685508] pciehp 0000:73:00.0:pcie004: pciehp_check_link_active: lnk_status = f083 [ 302.005967] pciehp 0000:73:00.0:pcie004: pciehp_check_link_status: lnk_status = f083 [ 302.014859] pci 0000:74:00.0: [15b3:1003] type 00 class 0x0c0600 also find other slot with other card still have extra link up problem on power off. That mean commit 68db9bc assumpation about power on/off on D3 is not right. > >- The configuration space of the port remains accessible in D3hot, so all > the functions to read or modify the Slot Status and Slot Control > registers need not be modified. Even turning on slot power doesn't seem > to require the port to be in D0, at least the PCIe spec doesn't say so > and I confirmed that by testing with a Thunderbolt controller. This patch put back D0 when trying to power on/off the slots. Signed-off-by: Yinghai Lu --- drivers/pci/hotplug/pciehp_ctrl.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) Index: linux-2.6/drivers/pci/hotplug/pciehp_ctrl.c =================================================================== --- linux-2.6.orig/drivers/pci/hotplug/pciehp_ctrl.c +++ linux-2.6/drivers/pci/hotplug/pciehp_ctrl.c @@ -86,17 +86,17 @@ static int board_added(struct slot *p_sl struct controller *ctrl = p_slot->ctrl; struct pci_bus *parent = ctrl->pcie->port->subordinate; + pm_runtime_get_sync(&ctrl->pcie->port->dev); if (POWER_CTRL(ctrl)) { /* Power on slot */ retval = pciehp_power_on_slot(p_slot); if (retval) - return retval; + goto err_exit; } pciehp_green_led_blink(p_slot); /* Check link training status */ - pm_runtime_get_sync(&ctrl->pcie->port->dev); retval = pciehp_check_link_status(ctrl); if (retval) { ctrl_err(ctrl, "Failed to check link status\n"); @@ -124,8 +124,9 @@ static int board_added(struct slot *p_sl return 0; err_exit: - pm_runtime_put(&ctrl->pcie->port->dev); set_slot_off(ctrl, p_slot); + pm_runtime_put(&ctrl->pcie->port->dev); + /* turn on Amber LED, turn off Green LED */ pciehp_green_led_off(p_slot); pciehp_set_attention_status(p_slot, 1); @@ -143,11 +144,13 @@ static int remove_board(struct slot *p_s pm_runtime_get_sync(&ctrl->pcie->port->dev); retval = pciehp_unconfigure_device(p_slot); - pm_runtime_put(&ctrl->pcie->port->dev); - if (retval) + if (retval) { + pm_runtime_put(&ctrl->pcie->port->dev); return retval; + } set_slot_off(ctrl, p_slot); + pm_runtime_put(&ctrl->pcie->port->dev); /* turn off Green LED */ pciehp_green_led_off(p_slot);