From patchwork Tue Dec 17 20:06:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 302458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AC6682C00D3 for ; Wed, 18 Dec 2013 07:07:55 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753851Ab3LQUGy (ORCPT ); Tue, 17 Dec 2013 15:06:54 -0500 Received: from mail-pd0-f169.google.com ([209.85.192.169]:54811 "EHLO mail-pd0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753832Ab3LQUGx (ORCPT ); Tue, 17 Dec 2013 15:06:53 -0500 Received: by mail-pd0-f169.google.com with SMTP id v10so7223359pde.14 for ; Tue, 17 Dec 2013 12:06:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :content-type:content-transfer-encoding; bh=G+GHpJofvuj0oPuojEBdEZ5dAF21M0n7+8ZCPzxwxqo=; b=ie8PPysw7Jf+y9DR4QjJImcDVDfAORaWsUIlLlFQJMaEEYqf5C/z8a7sPKkLZN7HCk YDIQ8wkgwcUm26p+jXN/rLJ2G+O0q5YkoP6p5JFrzsyJqa4QF20cKAloNkSwiGHCSLsB A+Ne3NooB/BOnxBZSWKHnGjahlei8xCGn3sSnAu5u73LywZ6lk1yVGbeiy5AQoXfsarx 12RqQNNPJUsvP/Y17iv/GVN1QtxbLRAgSXQAHrK0vlshrfM4Mr/OfEVhaBj1zV25Up2M aQJB/vpkq+Ml8H+G4dvKEbETNBmxs2saaTwJrG0TdKEaR0o/bJR/XQQevHeOX/1nygVW 5uTg== X-Received: by 10.68.176.65 with SMTP id cg1mr29579868pbc.145.1387310812826; Tue, 17 Dec 2013 12:06:52 -0800 (PST) Received: from [192.168.211.137] ([66.129.239.12]) by mx.google.com with ESMTPSA id gv10sm35899695pbd.0.2013.12.17.12.06.51 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 17 Dec 2013 12:06:52 -0800 (PST) Message-ID: <52B0AED9.6090402@gmail.com> Date: Tue, 17 Dec 2013 12:06:49 -0800 From: Rajat Jain User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130803 Thunderbird/17.0.8 MIME-Version: 1.0 To: Bjorn Helgaas , Kenji Kaneshige , Alex Williamson , Yijing Wang , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu CC: Guenter Roeck , Rajat Jain , Rajat Jain Subject: [PATCH v3 6/8] pciehp: Disabling the link notification across slot reset Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Disable the link notification (in addition to presence detect notifications) across the slot reset since it could potentialy flap the link and we don't want to treat it as hot unplug followed by a hotplug. Signed-off-by: Rajat Jain Signed-off-by: Guenter Roeck --- v3: * created by splitting the patch v2 [2/4] * Add the ATTN BTN condition v2: (non existent) v1: (non existent) drivers/pci/hotplug/pciehp_hpc.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index ab12555..c2f3e37 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -746,31 +746,36 @@ static void pcie_disable_notification(struct controller *ctrl) /* * pciehp has a 1:1 bus:slot relationship so we ultimately want a secondary - * bus reset of the bridge, but if the slot supports surprise removal we need - * to disable presence detection around the bus reset and clear any spurious + * bus reset of the bridge, but if the slot supports surprise removal (or + * link state change based hotplug), we need to disable presence detection + * (or link state notifications) around the bus reset and clear any spurious * events after. */ int pciehp_reset_slot(struct slot *slot, int probe) { struct controller *ctrl = slot->ctrl; + u16 stat_mask = 0, ctrl_mask = 0; if (probe) return 0; - if (HP_SUPR_RM(ctrl)) { - pcie_write_cmd(ctrl, 0, PCI_EXP_SLTCTL_PDCE); - if (pciehp_poll_mode) - del_timer_sync(&ctrl->poll_timer); + if (HP_SUPR_RM(ctrl) && !ATTN_BUTTN(ctrl)) { + ctrl_mask |= PCI_EXP_SLTCTL_PDCE; + stat_mask |= PCI_EXP_SLTSTA_PDC; } + ctrl_mask |= PCI_EXP_SLTCTL_DLLSCE; + stat_mask |= PCI_EXP_SLTSTA_DLLSC; + + pcie_write_cmd(ctrl, 0, ctrl_mask); + if (pciehp_poll_mode) + del_timer_sync(&ctrl->poll_timer); pci_reset_bridge_secondary_bus(ctrl->pcie->port); - if (HP_SUPR_RM(ctrl)) { - pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_PDC); - pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PDCE, PCI_EXP_SLTCTL_PDCE); - if (pciehp_poll_mode) - int_poll_timeout(ctrl->poll_timer.data); - } + pciehp_writew(ctrl, PCI_EXP_SLTSTA, stat_mask); + pcie_write_cmd(ctrl, ctrl_mask, ctrl_mask); + if (pciehp_poll_mode) + int_poll_timeout(ctrl->poll_timer.data); return 0; }