| Message ID | 20240201060228.3070928-4-aik@amd.com |
|---|---|
| State | New |
| Headers | show
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Thu, 1 Feb 2024 06:04:57 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EE3D.mail.protection.outlook.com (10.167.242.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.13 via Frontend Transport; Thu, 1 Feb 2024 06:04:57 +0000 Received: from aiemdee.2.ozlabs.ru (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Thu, 1 Feb 2024 00:04:49 -0600 From: Alexey Kardashevskiy <aik@amd.com> To: <linux-pci@vger.kernel.org> CC: <linux-kernel@vger.kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Jonathan Cameron <jonathan.cameron@huawei.com>, Lukas Wunner <lukas@wunner.de>, Alexey Kardashevskiy <aik@amd.com> Subject: [PATCH kernel 3/4] pci: Define TEE-IO bit in PCIe device capabilities Date: Thu, 1 Feb 2024 17:02:27 +1100 Message-ID: <20240201060228.3070928-4-aik@amd.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240201060228.3070928-1-aik@amd.com> References: <20240201060228.3070928-1-aik@amd.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: <linux-pci.vger.kernel.org> List-Subscribe: <mailto:linux-pci+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-pci+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3D:EE_|IA0PR12MB8714:EE_ X-MS-Office365-Filtering-Correlation-Id: b0cdca7e-bac5-411a-c2d8-08dc22ebb78b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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pci/doe/ide: Capabilities, protocols
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diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index b9c681f14181..e60b4df1f7d9 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -498,6 +498,7 @@ #define PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000 /* Slot Power Limit Value */ #define PCI_EXP_DEVCAP_PWR_SCL 0x0c000000 /* Slot Power Limit Scale */ #define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ +#define PCI_EXP_DEVCAP_TEE_IO 0x40000000 /* TEE-IO Supported (TDISP) */ #define PCI_EXP_DEVCTL 0x08 /* Device Control */ #define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ #define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */
A new bit #30 from the PCI Express Device Capabilities Register is defined in PCIe 6.1 as "TEE Device Interface Security Protocol (TDISP)". Define the macro. Signed-off-by: Alexey Kardashevskiy <aik@amd.com> --- include/uapi/linux/pci_regs.h | 1 + 1 file changed, 1 insertion(+)