| Message ID | 20221111135206.800062166@linutronix.de |
|---|---|
| State | New |
| Headers | show |
| Series | genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation | expand |
On Fri, Nov 11, 2022 at 02:58:54PM +0100, Thomas Gleixner wrote: > Provide the necessary constants for PCI/IMS support: > > - A new bus token for MSI irqdomain identification > - A MSI feature flag for the MSI irqdomains to signal support > - A secondary domain id > > The latter expands the device internal domain pointer storage array from 1 > to 2 entries. That extra pointer is mostly unused today, but the > alternative solutions would not be free either and would introduce more > complexity all over the place. Trade the 8bytes for simplicity. > > Signed-off-by: Thomas Gleixner <tglx@linutronix.de> > --- > include/linux/irqdomain_defs.h | 1 + > include/linux/msi.h | 2 ++ > include/linux/msi_api.h | 1 + > 3 files changed, 4 insertions(+) > > --- a/include/linux/irqdomain_defs.h > +++ b/include/linux/irqdomain_defs.h > @@ -25,6 +25,7 @@ enum irq_domain_bus_token { > DOMAIN_BUS_PCI_DEVICE_MSIX, > DOMAIN_BUS_DMAR, > DOMAIN_BUS_AMDVI, > + DOMAIN_BUS_PCI_DEVICE_IMS, I don't think we should call this IMS.. GENERIC maybe? Things that can support IMS should really, IMHO, just not check for PCI MSI/MSIX and effectively support everything. They don't override the write_msg, and they don't care how the message is programmed. > --- a/include/linux/msi.h > +++ b/include/linux/msi.h > @@ -525,6 +525,8 @@ enum { > MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19), > /* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */ > MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20), > + /* Support for PCI/IMS */ > + MSI_FLAG_PCI_IMS = (1 << 21), Maybe for legacy reasons it is too complicated, but it would be so much clearer of the special case of "I only know how to support PCI MSI and PCI MSI-X" was called out as a special flag, and the more general case of "any write_msg is fine by me" was left behind. I feel like when the device domain is created in the first place the parent domain(s) should be able to reject the creation if the requested child domain is not one it supports. Eg the hypervisor interactions checks if the child domain is PCI MSI or PCI MSI-X and rejects otherwise, because that is the only thing the hypervisor knows how to work with. If we did that perhaps we don't even need a flag or further checks? Jason
On Wed, Nov 16 2022 at 15:54, Jason Gunthorpe wrote: > On Fri, Nov 11, 2022 at 02:58:54PM +0100, Thomas Gleixner wrote: >> + /* Support for PCI/IMS */ >> + MSI_FLAG_PCI_IMS = (1 << 21), > > Maybe for legacy reasons it is too complicated, but it would be so > much clearer of the special case of "I only know how to support PCI > MSI and PCI MSI-X" was called out as a special flag, and the more > general case of "any write_msg is fine by me" was left behind. > > I feel like when the device domain is created in the first place the > parent domain(s) should be able to reject the creation if the > requested child domain is not one it supports. Eg the hypervisor > interactions checks if the child domain is PCI MSI or PCI MSI-X and > rejects otherwise, because that is the only thing the hypervisor knows > how to work with. > > If we did that perhaps we don't even need a flag or further checks? It's not that simple. The flags are part of the domain creation sanity checks and due to other constraints in our marvelous zoo of architectures, iommus, hypervisors and whatever being explicit about this is really required. Look at the GICv3-ITS voodoo which explicitly needs to differentiate between PCI and non-PCI MSI. I wish we could start from a clean slate, but that train has left the station long ago. Thanks, tglx
--- a/include/linux/irqdomain_defs.h +++ b/include/linux/irqdomain_defs.h @@ -25,6 +25,7 @@ enum irq_domain_bus_token { DOMAIN_BUS_PCI_DEVICE_MSIX, DOMAIN_BUS_DMAR, DOMAIN_BUS_AMDVI, + DOMAIN_BUS_PCI_DEVICE_IMS, }; #endif /* _LINUX_IRQDOMAIN_DEFS_H */ --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -525,6 +525,8 @@ enum { MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19), /* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */ MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20), + /* Support for PCI/IMS */ + MSI_FLAG_PCI_IMS = (1 << 21), }; /** --- a/include/linux/msi_api.h +++ b/include/linux/msi_api.h @@ -15,6 +15,7 @@ struct device; */ enum msi_domain_ids { MSI_DEFAULT_DOMAIN, + MSI_SECONDARY_DOMAIN, MSI_MAX_DEVICE_IRQDOMAINS, };
Provide the necessary constants for PCI/IMS support: - A new bus token for MSI irqdomain identification - A MSI feature flag for the MSI irqdomains to signal support - A secondary domain id The latter expands the device internal domain pointer storage array from 1 to 2 entries. That extra pointer is mostly unused today, but the alternative solutions would not be free either and would introduce more complexity all over the place. Trade the 8bytes for simplicity. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- include/linux/irqdomain_defs.h | 1 + include/linux/msi.h | 2 ++ include/linux/msi_api.h | 1 + 3 files changed, 4 insertions(+)