diff mbox series

[v3,5/9] phy: qcom-qmp-pcie: turn secondary programming table into a pointer

Message ID 20220909091433.3715981-6-dmitry.baryshkov@linaro.org
State New
Headers show
Series PCI: qcom: Support using the same PHY for both RC and EP | expand

Commit Message

Dmitry Baryshkov Sept. 9, 2022, 9:14 a.m. UTC 
Having a complete struct qmp_phy_cfg_tables as a secondary field in the
struct qmp_phy_cfg wastes memory, since most of the PHY configuration
tables do not have the secondary table. Change it to be a pointer to
lower the amount of wasted memory.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

Comments

Johan Hovold Sept. 14, 2022, 6:59 a.m. UTC | #1 
On Fri, Sep 09, 2022 at 12:14:29PM +0300, Dmitry Baryshkov wrote:
> Having a complete struct qmp_phy_cfg_tables as a secondary field in the
> struct qmp_phy_cfg wastes memory, since most of the PHY configuration
> tables do not have the secondary table. Change it to be a pointer to
> lower the amount of wasted memory.

Please be a bit more specific.

We're talking about four pointers per configuration and there are
currently about 15 configurations.

Is the added complexity really worth saving 400 bytes on 64-bit?

Johan
diff mbox series

Patch

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 5250c3f06c89..d115f7ef3901 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -1372,7 +1372,7 @@  struct qmp_phy_cfg {
 	 * Additional init sequence for PHY blocks, providing additional
 	 * register programming. Unless required it can be left omitted.
 	 */
-	struct qmp_phy_cfg_tables secondary;
+	struct qmp_phy_cfg_tables *secondary;
 
 	/* clock ids to be requested */
 	const char * const *clk_list;
@@ -1687,7 +1687,7 @@  static const struct qmp_phy_cfg sm8250_qmp_gen3x1_pciephy_cfg = {
 	.pcs_misc_tbl		= sm8250_qmp_pcie_pcs_misc_tbl,
 	.pcs_misc_tbl_num	= ARRAY_SIZE(sm8250_qmp_pcie_pcs_misc_tbl),
 	},
-	.secondary = {
+	.secondary = &(struct qmp_phy_cfg_tables) {
 	.serdes_tbl		= sm8250_qmp_gen3x1_pcie_serdes_tbl,
 	.serdes_tbl_num		= ARRAY_SIZE(sm8250_qmp_gen3x1_pcie_serdes_tbl),
 	.rx_tbl			= sm8250_qmp_gen3x1_pcie_rx_tbl,
@@ -1730,7 +1730,7 @@  static const struct qmp_phy_cfg sm8250_qmp_gen3x2_pciephy_cfg = {
 	.pcs_misc_tbl		= sm8250_qmp_pcie_pcs_misc_tbl,
 	.pcs_misc_tbl_num	= ARRAY_SIZE(sm8250_qmp_pcie_pcs_misc_tbl),
 	},
-	.secondary = {
+	.secondary = &(struct qmp_phy_cfg_tables) {
 	.tx_tbl			= sm8250_qmp_gen3x2_pcie_tx_tbl,
 	.tx_tbl_num		= ARRAY_SIZE(sm8250_qmp_gen3x2_pcie_tx_tbl),
 	.rx_tbl			= sm8250_qmp_gen3x2_pcie_rx_tbl,
@@ -2086,7 +2086,7 @@  static int qcom_qmp_phy_pcie_power_on(struct phy *phy)
 	int ret;
 
 	qcom_qmp_phy_pcie_serdes_init(qphy, &cfg->main);
-	qcom_qmp_phy_pcie_serdes_init(qphy, &cfg->secondary);
+	qcom_qmp_phy_pcie_serdes_init(qphy, cfg->secondary);
 
 	ret = clk_prepare_enable(qphy->pipe_clk);
 	if (ret) {
@@ -2096,10 +2096,10 @@  static int qcom_qmp_phy_pcie_power_on(struct phy *phy)
 
 	/* Tx, Rx, and PCS configurations */
 	qcom_qmp_phy_pcie_lanes_init(qphy, &cfg->main);
-	qcom_qmp_phy_pcie_lanes_init(qphy, &cfg->secondary);
+	qcom_qmp_phy_pcie_lanes_init(qphy, cfg->secondary);
 
 	qcom_qmp_phy_pcie_pcs_init(qphy, &cfg->main);
-	qcom_qmp_phy_pcie_pcs_init(qphy, &cfg->secondary);
+	qcom_qmp_phy_pcie_pcs_init(qphy, cfg->secondary);
 
 	/*
 	 * Pull out PHY from POWER DOWN state.