@@ -3,6 +3,7 @@ menuconfig CXL_BUS
tristate "CXL (Compute Express Link) Devices Support"
depends on PCI
select PCI_DOE
+ select PCI_CMA
help
CXL is a bus that is electrically compatible with PCI Express, but
layers three protocols on that signalling (CXL.io, CXL.cache, and
@@ -4,7 +4,9 @@
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/pci.h>
+#include <linux/pci-cma.h>
#include <linux/pci-doe.h>
+#include <linux/spdm.h>
#include <cxlpci.h>
#include <cxlmem.h>
#include <cxl.h>
@@ -625,3 +627,48 @@ void read_cdat_data(struct cxl_port *port)
}
}
EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL);
+
+/* Make a generic find routine that take the VID / Protocol */
+static struct pci_doe_mb *find_cma_doe(struct device *uport)
+{
+ struct cxl_memdev *cxlmd;
+ struct cxl_dev_state *cxlds;
+ unsigned long index;
+ void *entry;
+
+ cxlmd = to_cxl_memdev(uport);
+ cxlds = cxlmd->cxlds;
+
+ xa_for_each(&cxlds->doe_mbs, index, entry) {
+ struct pci_doe_mb *cur = entry;
+
+ if (pci_doe_supports_prot(cur, PCI_VENDOR_ID_PCI_SIG, 1))
+ return cur;
+ }
+
+ return NULL;
+}
+
+void cxl_cma_init(struct cxl_port *port)
+{
+ struct spdm_state *spdm_state;
+ struct pci_doe_mb *cma_doe;
+ struct device *dev = &port->dev;
+ struct device *uport = port->uport;
+ int rc;
+
+ cma_doe = find_cma_doe(uport);
+ if (!cma_doe) {
+ dev_info(dev, "No CDAT mailbox\n");
+ return;
+ }
+
+ spdm_state = pci_cma_create(dev, cma_doe);
+ rc = pci_cma_authenticate(spdm_state);
+ if (rc)
+ dev_info(dev, "No CMA support\n");
+ else
+ dev_info(dev, "Attestation passed\n");
+ pci_cma_destroy(spdm_state);
+}
+EXPORT_SYMBOL_NS_GPL(cxl_cma_init, CXL);
@@ -75,4 +75,5 @@ int devm_cxl_port_enumerate_dports(struct cxl_port *port);
struct cxl_dev_state;
int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm);
void read_cdat_data(struct cxl_port *port);
+void cxl_cma_init(struct cxl_port *port);
#endif /* __CXL_PCI_H__ */
@@ -55,6 +55,7 @@ static int cxl_port_probe(struct device *dev)
/* Cache the data early to ensure is_visible() works */
read_cdat_data(port);
+ cxl_cma_init(port);
get_device(&cxlmd->dev);
rc = devm_add_action_or_reset(dev, schedule_detach, cxlmd);
This is just for purposes of poking the CMA / SPDM code. What exactly the model in the driver looks like is still to be worked out. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- May still need to force non async probe as done in earlier versions. drivers/cxl/Kconfig | 1 + drivers/cxl/core/pci.c | 47 ++++++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxlpci.h | 1 + drivers/cxl/port.c | 1 + 4 files changed, 50 insertions(+)