| Message ID | 20210811064656.15399-6-kishon@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add SR-IOV support in PCIe Endpoint Core | expand |
On Wed, Aug 11, 2021 at 12:16:53PM +0530, Kishon Vijay Abraham I wrote: > No functional change. Simplify code to get register base address for > configuring PCI BAR. > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > .../pci/controller/cadence/pcie-cadence-ep.c | 18 ++++-------------- > drivers/pci/controller/cadence/pcie-cadence.h | 2 ++ > 2 files changed, 6 insertions(+), 14 deletions(-) > > diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c > index 912a15be8bfd..f337f0842400 100644 > --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c > +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c > @@ -97,13 +97,8 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn, > cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), > addr1); > > - if (bar < BAR_4) { > - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn); > - b = bar; > - } else { > - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn); > - b = bar - BAR_4; > - } > + reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn); > + b = (bar < BAR_4) ? bar : bar - BAR_4; > > cfg = cdns_pcie_readl(pcie, reg); > cfg &= ~(CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) | > @@ -126,13 +121,8 @@ static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, u8 vfn, > enum pci_barno bar = epf_bar->barno; > u32 reg, cfg, b, ctrl; > > - if (bar < BAR_4) { > - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn); > - b = bar; > - } else { > - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn); > - b = bar - BAR_4; > - } > + reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn); > + b = (bar < BAR_4) ? bar : bar - BAR_4; > > ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_DISABLED; > cfg = cdns_pcie_readl(pcie, reg); > diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h > index 30db2d68c17a..d5b1fcf2c39d 100644 > --- a/drivers/pci/controller/cadence/pcie-cadence.h > +++ b/drivers/pci/controller/cadence/pcie-cadence.h > @@ -46,6 +46,8 @@ > #define CDNS_PCIE_LM_EP_ID_BUS_SHIFT 8 > > /* Endpoint Function f BAR b Configuration Registers */ > +#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn) \ > + (((bar) < 4) ? CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn)) Why do we use "BAR_4" above and "4" here? Shouldn't they look the same? > #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) \ > (CDNS_PCIE_LM_BASE + 0x0240 + (fn) * 0x0008) > #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn) \ > -- > 2.17.1 >
diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c index 912a15be8bfd..f337f0842400 100644 --- a/drivers/pci/controller/cadence/pcie-cadence-ep.c +++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c @@ -97,13 +97,8 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn, cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), addr1); - if (bar < BAR_4) { - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn); - b = bar; - } else { - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn); - b = bar - BAR_4; - } + reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn); + b = (bar < BAR_4) ? bar : bar - BAR_4; cfg = cdns_pcie_readl(pcie, reg); cfg &= ~(CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) | @@ -126,13 +121,8 @@ static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, u8 vfn, enum pci_barno bar = epf_bar->barno; u32 reg, cfg, b, ctrl; - if (bar < BAR_4) { - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn); - b = bar; - } else { - reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn); - b = bar - BAR_4; - } + reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn); + b = (bar < BAR_4) ? bar : bar - BAR_4; ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_DISABLED; cfg = cdns_pcie_readl(pcie, reg); diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 30db2d68c17a..d5b1fcf2c39d 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -46,6 +46,8 @@ #define CDNS_PCIE_LM_EP_ID_BUS_SHIFT 8 /* Endpoint Function f BAR b Configuration Registers */ +#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn) \ + (((bar) < 4) ? CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn)) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) \ (CDNS_PCIE_LM_BASE + 0x0240 + (fn) * 0x0008) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn) \
No functional change. Simplify code to get register base address for configuring PCI BAR. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../pci/controller/cadence/pcie-cadence-ep.c | 18 ++++-------------- drivers/pci/controller/cadence/pcie-cadence.h | 2 ++ 2 files changed, 6 insertions(+), 14 deletions(-)