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[12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2

Message ID	20210126124004.52550-13-tony@atomide.com
State	New
Headers	show Return-Path: <linux-pci-owner@vger.kernel.org> From: Tony Lindgren <tony@atomide.com> To: linux-omap@vger.kernel.org Cc: =?utf-8?q?Beno=C3=AEt_Cousson?= <bcousson@baylibre.com>, devicetree@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>, Kishon Vijay Abraham I <kishon@ti.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Vignesh Raghavendra <vigneshr@ti.com>, linux-pci@vger.kernel.org Subject: [PATCH 12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2 Date: Tue, 26 Jan 2021 14:40:01 +0200 Message-Id: <20210126124004.52550-13-tony@atomide.com> In-Reply-To: <20210126124004.52550-1-tony@atomide.com> References: <20210126124004.52550-1-tony@atomide.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Update dra7 devicetree files to probe with genpd \| expand [PATCHv2,00/15] Update dra7 devicetree files to probe with genpd [01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver [02/15] ARM: dts: Update pcie ranges for dra7 [03/15] ARM: dts: Configure interconnect target module for dra7 pcie [04/15] ARM: dts: Properly configure dra7 edma sysconfig registers [05/15] ARM: dts: Move dra7 l3 noc to a separate node [06/15] ARM: dts: Configure interconnect target module for dra7 qspi [07/15] ARM: dts: Configure interconnect target module for dra7 sata [08/15] ARM: dts: Configure interconnect target module for dra7 mpu [09/15] ARM: dts: Configure interconnect target module for dra7 dmm [10/15] ARM: dts: Configure simple-pm-bus for dra7 l4_wkup [11/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per1 [12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2 [13/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per3 [14/15] ARM: dts: Configure simple-pm-bus for dra7 l4_cfg [15/15] ARM: dts: Configure simple-pm-bus for dra7 l3

Commit Message

Tony Lindgren Jan. 26, 2021, 12:40 p.m. UTC

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

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Patch

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -2302,7 +2302,10 @@  segment@200000 {					/* 0x48200000 */
 };
 
 &l4_per2 {						/* 0x48400000 */
-	compatible = "ti,dra7-l4-per2", "simple-bus";
+	compatible = "ti,dra7-l4-per2", "simple-pm-bus";
+	power-domains = <&prm_l4per>;
+	clocks = <&l4per2_clkctrl DRA7_L4PER2_L4_PER2_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x48400000 0x800>,
 	      <0x48400800 0x800>,
 	      <0x48401000 0x400>,
@@ -2322,7 +2325,7 @@  &l4_per2 {						/* 0x48400000 */
 		 <0x48454000 0x48454000 0x400000>;	/* L3 data port */
 
 	segment@0 {					/* 0x48400000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */