From patchwork Mon Nov 9 17:19:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 1396946 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=oypMcFr2; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CVHn66gKDz9sRR for ; Tue, 10 Nov 2020 04:20:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731150AbgKIRUH (ORCPT ); Mon, 9 Nov 2020 12:20:07 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:1312 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730596AbgKIRUG (ORCPT ); Mon, 9 Nov 2020 12:20:06 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Mon, 09 Nov 2020 09:20:02 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 9 Nov 2020 17:20:02 +0000 Received: from vidyas-desktop.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Mon, 9 Nov 2020 17:19:58 +0000 From: Vidya Sagar To: , , , , , , , CC: , , , , , , Subject: [PATCH V4 3/6] PCI: tegra: Set DesignWare IP version Date: Mon, 9 Nov 2020 22:49:34 +0530 Message-ID: <20201109171937.28326-4-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201109171937.28326-1-vidyas@nvidia.com> References: <20201109171937.28326-1-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1604942402; bh=FP2gHeTeyzWMUtRfjARM/eW0XneCZBcNfBFaI/Le1gg=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=oypMcFr2CZqa+O4qTu7x3e4CSDIPDVSq/ZdSn5uWZ8tdB78AAd0KC7C7FmZIyshXO BoAMMKE/p+F4givS9I4HQpMnGOFKvH7HFB0aW1vDeQhiRTUEj6i1MjIaEh4GpBwYm/ 74eX7zEWAtAztrJXHa/iB0UA0fUypEn6vNzfmoWE6YesLOuV+EKaFnecT/wAzZIcFt 5asxjyhrYhqTUplLyO8nEPq4elIWid7soVei2kvEzfcHwiGpsntWOVmALoXUaiV0gn mFHobcwQKclII5iiYpUm2hRhP3G5z6hFeXOGvUkjNZyZmplhcDDSJHZqGVl0FaXRHP jSlm5EQgK8leg== Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Set the DesignWare IP version for Tegra194 to 0x490A. This would be used by the DesigWare sub-system to do any version specific configuration (Ex:- TD bit programming for ECRC). Signed-off-by: Vidya Sagar Tested-by: Thierry Reding Acked-by: Thierry Reding --- V4: * None V3: * None V2: * None drivers/pci/controller/dwc/pcie-tegra194.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 7a0c64436861..253d91033bc3 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -2011,6 +2011,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev) pci->ops = &tegra_dw_pcie_ops; pci->n_fts[0] = N_FTS_VAL; pci->n_fts[1] = FTS_VAL; + pci->version = 0x490A; pp = &pci->pp; pcie->dev = &pdev->dev;