| Message ID | 20201102101154.13598-9-kishon@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | J7200: Add PCIe DT nodes to Enable PCIe | expand |
On 15:41-20201102, Kishon Vijay Abraham I wrote: > PCIe controller in J721E supports a maximum of 32 outbound regions. > commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree > nodes") incorrectly added maximum number of outbound regions to 16. Fix > it here. > > Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index e2a96b2c423c..61b533130ed1 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -652,7 +652,7 @@ > power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; > clocks = <&k3_clks 239 1>; > clock-names = "fck"; > - cdns,max-outbound-regions = <16>; > + cdns,max-outbound-regions = <32>; > max-functions = /bits/ 8 <6>; > max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; > dma-coherent; > @@ -701,7 +701,7 @@ > power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; > clocks = <&k3_clks 240 1>; > clock-names = "fck"; > - cdns,max-outbound-regions = <16>; > + cdns,max-outbound-regions = <32>; > max-functions = /bits/ 8 <6>; > max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; > dma-coherent; > @@ -750,7 +750,7 @@ > power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; > clocks = <&k3_clks 241 1>; > clock-names = "fck"; > - cdns,max-outbound-regions = <16>; > + cdns,max-outbound-regions = <32>; > max-functions = /bits/ 8 <6>; > max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; > dma-coherent; > @@ -799,7 +799,7 @@ > power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; > clocks = <&k3_clks 242 1>; > clock-names = "fck"; > - cdns,max-outbound-regions = <16>; > + cdns,max-outbound-regions = <32>; > max-functions = /bits/ 8 <6>; > max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; > dma-coherent; > -- > 2.17.1 > Does this need to be part of this series? If NOT, please pull this out and repost so that it can be independently picked up since there is no dependency on the bindings or any part of this series?
Nishanth, On 02/11/20 10:11 pm, Nishanth Menon wrote: > On 15:41-20201102, Kishon Vijay Abraham I wrote: >> PCIe controller in J721E supports a maximum of 32 outbound regions. >> commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree >> nodes") incorrectly added maximum number of outbound regions to 16. Fix >> it here. >> >> Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> index e2a96b2c423c..61b533130ed1 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> @@ -652,7 +652,7 @@ >> power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; >> clocks = <&k3_clks 239 1>; >> clock-names = "fck"; >> - cdns,max-outbound-regions = <16>; >> + cdns,max-outbound-regions = <32>; >> max-functions = /bits/ 8 <6>; >> max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; >> dma-coherent; >> @@ -701,7 +701,7 @@ >> power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; >> clocks = <&k3_clks 240 1>; >> clock-names = "fck"; >> - cdns,max-outbound-regions = <16>; >> + cdns,max-outbound-regions = <32>; >> max-functions = /bits/ 8 <6>; >> max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; >> dma-coherent; >> @@ -750,7 +750,7 @@ >> power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; >> clocks = <&k3_clks 241 1>; >> clock-names = "fck"; >> - cdns,max-outbound-regions = <16>; >> + cdns,max-outbound-regions = <32>; >> max-functions = /bits/ 8 <6>; >> max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; >> dma-coherent; >> @@ -799,7 +799,7 @@ >> power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; >> clocks = <&k3_clks 242 1>; >> clock-names = "fck"; >> - cdns,max-outbound-regions = <16>; >> + cdns,max-outbound-regions = <32>; >> max-functions = /bits/ 8 <6>; >> max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; >> dma-coherent; >> -- >> 2.17.1 >> > > Does this need to be part of this series? If NOT, please pull this out > and repost so that it can be independently picked up since there is no > dependency on the bindings or any part of this series? > Sure, okay! Regards Kishon
On Mon, Nov 02, 2020 at 10:41:37AM -0600, Nishanth Menon wrote: > On 15:41-20201102, Kishon Vijay Abraham I wrote: > > PCIe controller in J721E supports a maximum of 32 outbound regions. > > commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree > > nodes") incorrectly added maximum number of outbound regions to 16. Fix > > it here. > > > > Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > > --- > > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > > index e2a96b2c423c..61b533130ed1 100644 > > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > > @@ -652,7 +652,7 @@ > > power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; > > clocks = <&k3_clks 239 1>; > > clock-names = "fck"; > > - cdns,max-outbound-regions = <16>; > > + cdns,max-outbound-regions = <32>; Can this be made detectable instead? Write to region registers and check the write sticks? I'm doing this for the DWC controller. Or make the property optional with the default being the max (32). Rob
Hi Rob, On 05/11/20 10:23 pm, Rob Herring wrote: > On Mon, Nov 02, 2020 at 10:41:37AM -0600, Nishanth Menon wrote: >> On 15:41-20201102, Kishon Vijay Abraham I wrote: >>> PCIe controller in J721E supports a maximum of 32 outbound regions. >>> commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree >>> nodes") incorrectly added maximum number of outbound regions to 16. Fix >>> it here. >>> >>> Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") >>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>> --- >>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++---- >>> 1 file changed, 4 insertions(+), 4 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> index e2a96b2c423c..61b533130ed1 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>> @@ -652,7 +652,7 @@ >>> power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; >>> clocks = <&k3_clks 239 1>; >>> clock-names = "fck"; >>> - cdns,max-outbound-regions = <16>; >>> + cdns,max-outbound-regions = <32>; > > Can this be made detectable instead? Write to region registers and check > the write sticks? I'm doing this for the DWC controller. > > Or make the property optional with the default being the max (32). okay, I'll make this an optional property and send a patch which removes cdns,max-outbound-regions in k3-j721e-main.dtsi. Thanks, Kishon
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index e2a96b2c423c..61b533130ed1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -652,7 +652,7 @@ power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 239 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; + cdns,max-outbound-regions = <32>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -701,7 +701,7 @@ power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 240 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; + cdns,max-outbound-regions = <32>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -750,7 +750,7 @@ power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 241 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; + cdns,max-outbound-regions = <32>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -799,7 +799,7 @@ power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 242 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; + cdns,max-outbound-regions = <32>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent;
PCIe controller in J721E supports a maximum of 32 outbound regions. commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") incorrectly added maximum number of outbound regions to 16. Fix it here. Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)