From patchwork Wed Aug 9 14:14:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 799818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="h03AcH0p"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xSCvp0dbLz9s1h for ; Thu, 10 Aug 2017 00:15:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752518AbdHIOPB (ORCPT ); Wed, 9 Aug 2017 10:15:01 -0400 Received: from mail-lf0-f43.google.com ([209.85.215.43]:33405 "EHLO mail-lf0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751704AbdHIOPA (ORCPT ); Wed, 9 Aug 2017 10:15:00 -0400 Received: by mail-lf0-f43.google.com with SMTP id d17so28685279lfe.0 for ; Wed, 09 Aug 2017 07:15:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=CDuRDBxplIKWIPKCdMpIWskNS8xomnUHQlKShqtOZro=; b=h03AcH0pQTaAvHp9ABCLUPlJG49y6GnpLSrAIzQ9+tV0J1reuTN8yiQtp9yzuhQQ7R Q7knoLr3Er5GnayKJ70zawZf09/k2QYrKkOGUFeII6xuCMMO+CGwCfRL6cFpcDiG720t QYYl8OmB0cKlBFj+daS9h9ldUBnomKT9iFv2I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=CDuRDBxplIKWIPKCdMpIWskNS8xomnUHQlKShqtOZro=; b=nYKRO+BW/yiWrpx/T/chtLf/1MQMCa/MmMyUUlAteNHKwKkeq+fQoVfkrezIT110ZV lQzyFWiqKUPWiP2WTrK0Vwe1SsbAp8aXuWjGNL4Eaj44VFm4TXRhvWupPwEyKbnK8tZA iKah6O2d1VZj0vjNjzJ3sOeaH6RlARrkerKzRk5FyNyLf7b/r5BSwU6TYsNTEi0NbSCU OlgMLEi2ugfB/suhWM8qtuAB1ivJuEAzvhi8naUmePdMiWO68vklDQJFqgrdKS0y0OXD ctRvfk/k164eyVDg0vKBziAJnx6duu44NgusrnXZhZ3cmruaJk6RcmkFHeM2bkfB/7qf nmbw== X-Gm-Message-State: AHYfb5iDxuJjtO0UFQGjP6UV5mx423lLzPIMeAzw3F6CY2hhszIOsFK/ g9g+PKiHCbX6I0lU X-Received: by 10.46.9.206 with SMTP id 197mr2557122ljj.45.1502288099546; Wed, 09 Aug 2017 07:14:59 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id s2sm633054ljd.62.2017.08.09.07.14.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 Aug 2017 07:14:58 -0700 (PDT) From: Linus Walleij To: Bjorn Helgaas , Lorenzo Pieralisi , Arnd Bergmann Cc: linux-pci@vger.kernel.org, Linus Walleij Subject: [PATCH 1/2 v2] PCI: v3: Update the device tree bindings Date: Wed, 9 Aug 2017 16:14:54 +0200 Message-Id: <20170809141455.22220-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The bindings for the V3 Semiconductor PCI bridge are a tad bit outdated and predates the more formal format we have adopted for the bindings. Update them a bit so it is easier to read, and add the Integrator AP- specific compatible so we can detect that we are running on that specific platform. Acked-by: Rob Herring Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Added Rob's ACK. Bjorn: please merge this when you feel confident with it. --- .../devicetree/bindings/pci/v3-v360epc-pci.txt | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt index 30b364e504ba..bcc5fe2a74cb 100644 --- a/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt +++ b/Documentation/devicetree/bindings/pci/v3-v360epc-pci.txt @@ -2,14 +2,15 @@ V3 Semiconductor V360 EPC PCI bridge This bridge is found in the ARM Integrator/AP (Application Platform) -Integrator-specific notes: - -- syscon: should contain a link to the syscon device node (since - on the Integrator, some registers in the syscon are required to - operate the V3). - -V360 EPC specific notes: - -- reg: should contain the base address of the V3 adapter. +Required properties: +- compatible: should be one of: + "v3,v360epc-pci" + "arm,integrator-ap-pci", "v3,v360epc-pci" +- reg: should contain the base address of the V3 host bridge. - interrupts: should contain a reference to the V3 error interrupt as routed on the system. + +Integrator-specific required properties: +- syscon: should contain a link to the syscon device node, since + on the Integrator, some registers in the syscon are required to + operate the V3 host bridge.