From patchwork Sat Jun 4 00:06:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 630092 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rM1VX3p7dz9t9N for ; Sat, 4 Jun 2016 10:07:16 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751177AbcFDAHO (ORCPT ); Fri, 3 Jun 2016 20:07:14 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:47479 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751057AbcFDAHN (ORCPT ); Fri, 3 Jun 2016 20:07:13 -0400 Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id u54075Wu028511 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sat, 4 Jun 2016 00:07:06 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by userv0021.oracle.com (8.13.8/8.13.8) with ESMTP id u54074Cx003963 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sat, 4 Jun 2016 00:07:05 GMT Received: from abhmp0019.oracle.com (abhmp0019.oracle.com [141.146.116.25]) by aserv0122.oracle.com (8.13.8/8.13.8) with ESMTP id u540743B029145; Sat, 4 Jun 2016 00:07:04 GMT Received: from aserv0021.oracle.com (/10.132.126.127) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Fri, 03 Jun 2016 16:07:04 -0800 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Linus Torvalds Cc: Wei Yang , Khalid Aziz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v12 13/15] PCI: Add has_mem64 for struct host_bridge Date: Fri, 3 Jun 2016 17:06:40 -0700 Message-Id: <20160604000642.28162-14-yinghai@kernel.org> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160604000642.28162-1-yinghai@kernel.org> References: <20160604000642.28162-1-yinghai@kernel.org> X-Source-IP: userv0021.oracle.com [156.151.31.71] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add has_mem64 for struct host_bridge, on root bus that does not support mmio64 above 4g, will not set that. We will use that info next two following patches: 1. Don't treat non-pref mmio64 as pref mmio, so will not put it under bridge's pref range when rescan the devices 2. will keep pref mmio64 and pref mmio32 under bridge pref bar. Signed-off-by: Yinghai Lu Tested-by: Khalid Aziz --- drivers/pci/probe.c | 7 +++++++ include/linux/pci.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 5d11dec..90091fa 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2231,6 +2231,13 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, } else bus_addr[0] = '\0'; dev_info(&b->dev, "root bus resource %pR%s\n", res, bus_addr); + + if (resource_type(res) == IORESOURCE_MEM) { + if ((res->end - offset) > 0xffffffff) + bridge->has_mem64 = 1; + if ((res->start - offset) > 0xffffffff) + res->flags |= IORESOURCE_MEM_64; + } } down_write(&pci_bus_sem); diff --git a/include/linux/pci.h b/include/linux/pci.h index daaac38..2aa83fa 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -412,6 +412,7 @@ struct pci_host_bridge { void (*release_fn)(struct pci_host_bridge *); void *release_data; unsigned int ignore_reset_delay:1; /* for entire hierarchy */ + unsigned int has_mem64:1; /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, const struct resource *res,