From patchwork Tue Jan 7 00:56:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 307502 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C6FBC2C0096 for ; Tue, 7 Jan 2014 11:58:09 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756710AbaAGA43 (ORCPT ); Mon, 6 Jan 2014 19:56:29 -0500 Received: from mail-ig0-f180.google.com ([209.85.213.180]:56219 "EHLO mail-ig0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757865AbaAGA40 (ORCPT ); Mon, 6 Jan 2014 19:56:26 -0500 Received: by mail-ig0-f180.google.com with SMTP id m12so277729iga.1 for ; Mon, 06 Jan 2014 16:56:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=+tOItYGkzi5tHn67TVt0WQ1RPExV4CVdVnKdn88xgfI=; b=GnsHh9p47Y+0G4vhPA/LjiHLPDq58AA+XPY4kc/3qaTe0+jA7DYiVCzjCPzAvb/0Rw RKJhoRy1pBZAijT2KG2axxDFz8OjYEPJpKi/4PFNbpPxlR7FLzoo2PUac95TqkOa6S6q Vn3jRbwC/q7fRWNgVBTRDKCUxYuUKJZ302MClXIK/6PQpbPHTkwPu1oZ97tZbr9AOQkq c9ewF3v5WexsijJ2Fe3rYFmJDA+Z5W9Qj3enPAAdNPb2NDgp7a6QnSXONWgpajE9DAaZ JWY3Az1ZWArQXEp6dEZaA2N6kcxUdrDTLZdQhRGjoOV3l/qgPX59ZBJOPVtHp2Nf8ngk OMQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=+tOItYGkzi5tHn67TVt0WQ1RPExV4CVdVnKdn88xgfI=; b=g0DFJ21O3jr/y0PT9aW8A394aM8N+k0MTslTEATNG1GLa0RRPexLnbCUFVgsFWaAAN 6JyYhP+mMCqqAF6enCAqaMv16Lbuj7NtR/jnCKp1XrC7fJekkCVa8Jlm9J7Ykgw6pauA +UfZ/XcCNdh5Kgx8zJsWZLrAWA+bjqch48su/9BsaBnnO0gGtDh33XV8xHak+gvDlRAS oa7xOT73rm+EtjhUmUg46+VaNbt7lwFQYjgATMOmhR705GlG3mE/UUHDYhvFUBrg10ou UTqcJ1n0fbJMTohKpSbCoZHZ9AWjMKQDl76/zTqrX1Xghh4AMHn4F+HWHsmg+QGqjdHd WTmQ== X-Gm-Message-State: ALoCoQmC4taSEUxPTB/iyhcBQvrkSs+NJSF9ln5fgMrBGTYy4pGWrzAdKZ/RdswYOrgUiAfgCNyXS/KbH6CP9fTBWL6iO+zVUSWq7N1xJaMA50l4KchDeSj/QvGZCQpI1Q6nBtzugsHhbjJRFDBtfPfxlG8sAMUYLgURHD1LWl1LSksmxlwPPK+aOoqFR9UWDku5cRj8jUC9c/fTwFJlX5ef5bNyucvjtolUMFZyz23odKSkHnONc2U= X-Received: by 10.50.25.227 with SMTP id f3mr22435205igg.21.1389056185891; Mon, 06 Jan 2014 16:56:25 -0800 (PST) Received: from localhost ([172.29.127.26]) by mx.google.com with ESMTPSA id lp9sm913744igb.2.2014.01.06.16.56.24 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 06 Jan 2014 16:56:25 -0800 (PST) Subject: [PATCH v7 10/15] agp/intel: Use pci_bus_address() to get GTTADR bus address To: linux-pci@vger.kernel.org, Daniel Vetter From: Bjorn Helgaas Cc: David Airlie , Yinghai Lu , Guo Chao , linux-kernel@vger.kernel.org Date: Mon, 06 Jan 2014 17:56:24 -0700 Message-ID: <20140107005624.10786.67196.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <20140107005003.10786.85164.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <20140107005003.10786.85164.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Per the Intel 915G/915GV/... Chipset spec (document number 301467-005), GTTADR is a standard PCI BAR. The PCI core reads GTTADR at enumeration-time. Use pci_bus_address() instead of reading it again in the driver. This works correctly for both 32-bit and 64-bit BARs. The spec above only mentions 32-bit GTTADR, but we should still use the standard interface. Signed-off-by: Bjorn Helgaas --- drivers/char/agp/intel-agp.h | 2 +- drivers/char/agp/intel-gtt.c | 7 +++---- 2 files changed, 4 insertions(+), 5 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index 18bbaafb8509..fda073dcd967 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h @@ -115,7 +115,7 @@ /* intel 915G registers */ #define I915_GMADR_BAR 2 #define I915_MMADR_BAR 0 -#define I915_PTEADDR 0x1C +#define I915_PTE_BAR 3 #define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) #define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 58916f32c0f3..dd8b66a617dc 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -1102,7 +1102,7 @@ static void i965_write_entry(dma_addr_t addr, static int i9xx_setup(void) { - u32 reg_addr, gtt_addr; + u32 reg_addr; int size = KB(512); reg_addr = pci_bus_address(intel_private.pcidev, I915_MMADR_BAR); @@ -1113,9 +1113,8 @@ static int i9xx_setup(void) switch (INTEL_GTT_GEN) { case 3: - pci_read_config_dword(intel_private.pcidev, - I915_PTEADDR, >t_addr); - intel_private.gtt_phys_addr = gtt_addr; + intel_private.gtt_phys_addr = + pci_bus_address(intel_private.pcidev, I915_PTE_BAR); break; case 5: intel_private.gtt_phys_addr = reg_addr + MB(2);