diff mbox series

[v7,7/8] PCI: imx6: Disable enabled clocks and regulators after link is down

Message ID 1644992463-14467-8-git-send-email-hongxing.zhu@nxp.com
State New
Headers show
Series PCI: imx6: refine codes and add compliance tests mode support | expand

Commit Message

Hongxing Zhu Feb. 16, 2022, 6:21 a.m. UTC
Since i.MX PCIe doesn't support the hot-plug, and to save power
consumption as much as possible. Return error and disable the enabled
clocks and regulators when link is down,.

Add a new host_exit() callback for i.MX PCIe driver to disable the
enabled clocks, regulators and so on in the error handling after
host_init is finished.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 30 ++++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

Comments

Bjorn Helgaas Feb. 23, 2022, 5:50 p.m. UTC | #1
In subject,

s/Disable enabled clocks/Disable clocks/

On Wed, Feb 16, 2022 at 02:21:02PM +0800, Richard Zhu wrote:
> Since i.MX PCIe doesn't support the hot-plug, and to save power
> consumption as much as possible. Return error and disable the enabled
> clocks and regulators when link is down,.

Maybe:

  Since i.MX PCIe doesn't support hot-plug, reduce power consumption
  as much as possible by disabling clocks and regulators and returning
  error when the link is down.

> Add a new host_exit() callback for i.MX PCIe driver to disable the
> enabled clocks, regulators and so on in the error handling after
> host_init is finished.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 30 ++++++++++++++++++++++++---
>  1 file changed, 27 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 242d8ef73c1e..fe671e88ec93 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -848,7 +848,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
>  	/* Start LTSSM. */
>  	imx6_pcie_ltssm_enable(dev);
>  
> -	dw_pcie_wait_for_link(pci);
> +	ret = dw_pcie_wait_for_link(pci);
> +	if (ret)
> +		goto err_reset_phy;

These labels look wrong now, since you no longer reset the PHY at
err_reset_phy.

>  	if (pci->link_gen == 2) {
>  		/* Allow Gen2 mode after the link is up. */
> @@ -884,7 +886,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
>  		}
>  
>  		/* Make sure link training is finished as well! */
> -		dw_pcie_wait_for_link(pci);
> +		ret = dw_pcie_wait_for_link(pci);
> +		if (ret)
> +			goto err_reset_phy;
>  	} else {
>  		dev_info(dev, "Link: Gen2 disabled\n");
>  	}
> @@ -897,7 +901,6 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
>  	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
>  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
>  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> -	imx6_pcie_reset_phy(imx6_pcie);
>  	return ret;
>  }
>  
> @@ -921,8 +924,29 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
>  	return 0;
>  }
>  
> +static void imx6_pcie_host_exit(struct pcie_port *pp)
> +{
> +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> +	struct device *dev = pci->dev;
> +	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
> +
> +	imx6_pcie_reset_phy(imx6_pcie);
> +	imx6_pcie_clk_disable(imx6_pcie);
> +	switch (imx6_pcie->drvdata->variant) {
> +	case IMX8MM:
> +		if (phy_power_off(imx6_pcie->phy))
> +			dev_err(dev, "unable to power off phy\n");
> +		break;
> +	default:
> +		break;
> +	}
> +	if (imx6_pcie->vpcie)
> +		regulator_disable(imx6_pcie->vpcie);
> +}
> +
>  static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
>  	.host_init = imx6_pcie_host_init,
> +	.host_exit = imx6_pcie_host_exit,
>  };
>  
>  static const struct dw_pcie_ops dw_pcie_ops = {
> -- 
> 2.25.1
>
Hongxing Zhu Feb. 24, 2022, 7:51 a.m. UTC | #2
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2022年2月24日 1:50
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com; broonie@kernel.org;
> lorenzo.pieralisi@arm.com; jingoohan1@gmail.com; festevam@gmail.com;
> francesco.dolcini@toradex.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v7 7/8] PCI: imx6: Disable enabled clocks and regulators
> after link is down
> 
> In subject,
> 
> s/Disable enabled clocks/Disable clocks/
Okay, would be updated later.
Thanks.

> 
> On Wed, Feb 16, 2022 at 02:21:02PM +0800, Richard Zhu wrote:
> > Since i.MX PCIe doesn't support the hot-plug, and to save power
> > consumption as much as possible. Return error and disable the enabled
> > clocks and regulators when link is down,.
> 
> Maybe:
> 
>   Since i.MX PCIe doesn't support hot-plug, reduce power consumption
>   as much as possible by disabling clocks and regulators and returning
>   error when the link is down.
Okay.

> 
> > Add a new host_exit() callback for i.MX PCIe driver to disable the
> > enabled clocks, regulators and so on in the error handling after
> > host_init is finished.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 30
> > ++++++++++++++++++++++++---
> >  1 file changed, 27 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 242d8ef73c1e..fe671e88ec93 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -848,7 +848,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> >  	/* Start LTSSM. */
> >  	imx6_pcie_ltssm_enable(dev);
> >
> > -	dw_pcie_wait_for_link(pci);
> > +	ret = dw_pcie_wait_for_link(pci);
> > +	if (ret)
> > +		goto err_reset_phy;
> 
> These labels look wrong now, since you no longer reset the PHY at
> err_reset_phy.
You're right. Would be replaced by "err_out" later.
Thanks.

Best Regards
Richard Zhu

> 
> >  	if (pci->link_gen == 2) {
> >  		/* Allow Gen2 mode after the link is up. */ @@ -884,7 +886,9 @@
> > static int imx6_pcie_start_link(struct dw_pcie *pci)
> >  		}
> >
> >  		/* Make sure link training is finished as well! */
> > -		dw_pcie_wait_for_link(pci);
> > +		ret = dw_pcie_wait_for_link(pci);
> > +		if (ret)
> > +			goto err_reset_phy;
> >  	} else {
> >  		dev_info(dev, "Link: Gen2 disabled\n");
> >  	}
> > @@ -897,7 +901,6 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> >  	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> >  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> >  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> > -	imx6_pcie_reset_phy(imx6_pcie);
> >  	return ret;
> >  }
> >
> > @@ -921,8 +924,29 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
> >  	return 0;
> >  }
> >
> > +static void imx6_pcie_host_exit(struct pcie_port *pp) {
> > +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > +	struct device *dev = pci->dev;
> > +	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
> > +
> > +	imx6_pcie_reset_phy(imx6_pcie);
> > +	imx6_pcie_clk_disable(imx6_pcie);
> > +	switch (imx6_pcie->drvdata->variant) {
> > +	case IMX8MM:
> > +		if (phy_power_off(imx6_pcie->phy))
> > +			dev_err(dev, "unable to power off phy\n");
> > +		break;
> > +	default:
> > +		break;
> > +	}
> > +	if (imx6_pcie->vpcie)
> > +		regulator_disable(imx6_pcie->vpcie);
> > +}
> > +
> >  static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
> >  	.host_init = imx6_pcie_host_init,
> > +	.host_exit = imx6_pcie_host_exit,
> >  };
> >
> >  static const struct dw_pcie_ops dw_pcie_ops = {
> > --
> > 2.25.1
> >
diff mbox series

Patch

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 242d8ef73c1e..fe671e88ec93 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -848,7 +848,9 @@  static int imx6_pcie_start_link(struct dw_pcie *pci)
 	/* Start LTSSM. */
 	imx6_pcie_ltssm_enable(dev);
 
-	dw_pcie_wait_for_link(pci);
+	ret = dw_pcie_wait_for_link(pci);
+	if (ret)
+		goto err_reset_phy;
 
 	if (pci->link_gen == 2) {
 		/* Allow Gen2 mode after the link is up. */
@@ -884,7 +886,9 @@  static int imx6_pcie_start_link(struct dw_pcie *pci)
 		}
 
 		/* Make sure link training is finished as well! */
-		dw_pcie_wait_for_link(pci);
+		ret = dw_pcie_wait_for_link(pci);
+		if (ret)
+			goto err_reset_phy;
 	} else {
 		dev_info(dev, "Link: Gen2 disabled\n");
 	}
@@ -897,7 +901,6 @@  static int imx6_pcie_start_link(struct dw_pcie *pci)
 	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
 		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
-	imx6_pcie_reset_phy(imx6_pcie);
 	return ret;
 }
 
@@ -921,8 +924,29 @@  static int imx6_pcie_host_init(struct pcie_port *pp)
 	return 0;
 }
 
+static void imx6_pcie_host_exit(struct pcie_port *pp)
+{
+	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+	struct device *dev = pci->dev;
+	struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
+
+	imx6_pcie_reset_phy(imx6_pcie);
+	imx6_pcie_clk_disable(imx6_pcie);
+	switch (imx6_pcie->drvdata->variant) {
+	case IMX8MM:
+		if (phy_power_off(imx6_pcie->phy))
+			dev_err(dev, "unable to power off phy\n");
+		break;
+	default:
+		break;
+	}
+	if (imx6_pcie->vpcie)
+		regulator_disable(imx6_pcie->vpcie);
+}
+
 static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
 	.host_init = imx6_pcie_host_init,
+	.host_exit = imx6_pcie_host_exit,
 };
 
 static const struct dw_pcie_ops dw_pcie_ops = {