| Message ID | 1641368602-20401-5-git-send-email-hongxing.zhu@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: imx6: refine codes and add compliance tests mode support | expand |
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f4755f3a03be..461863bde3c9 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -405,7 +405,7 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { ret = pci->ops->start_link(pci); if (ret) - goto err_free_msi; + goto err_host_init; } /* Ignore errors, the link may come up later */ @@ -417,6 +417,9 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!ret) return 0; +err_host_init: + if (pp->ops->host_exit) + pp->ops->host_exit(pp); err_free_msi: if (pp->has_msi_ctrl) dw_pcie_free_msi(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 7d6e9b7576be..1153687ea9a6 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -174,6 +174,7 @@ enum dw_pcie_device_mode { struct dw_pcie_host_ops { int (*host_init)(struct pcie_port *pp); + void (*host_exit)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); };
When link is never came up in the link training after host_init. The clocks and power supplies usage counter balance should be handled properly on some DWC platforms (for example, i.MX PCIe). Add a new host_exit() callback into dw_pcie_host_ops, then it could be invoked to handle the unbalance issue in the error handling after host_init() function when link is down. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-)