From patchwork Wed Dec 27 10:05:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Ledvich X-Patchwork-Id: 853129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="key not found in DNS" (0-bit key; unprotected) header.d=compulab.co.il header.i=@compulab.co.il header.b="G5JKdhl+"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z696p4lfKz9s7s for ; Wed, 27 Dec 2017 22:07:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751002AbdL0LH2 (ORCPT ); Wed, 27 Dec 2017 06:07:28 -0500 Received: from softlayer.compulab.co.il ([50.23.254.55]:58650 "EHLO compulab.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750952AbdL0LH1 (ORCPT ); Wed, 27 Dec 2017 06:07:27 -0500 X-Greylist: delayed 3628 seconds by postgrey-1.27 at vger.kernel.org; Wed, 27 Dec 2017 06:07:27 EST DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=compulab.co.il; s=default; h=Message-Id:Date:Subject:Cc:To:From:Sender: Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=hcY6dcZz9+6jgvHjPc2MP67jAHGR7eRqr7GxZF0ByHo=; b=G5JKdhl+81H7FHgfhla7S0ab42 H6niRIjF+pezP2d+4mdBDnElfPPYi6qBLufQ6cK1bDm6cKhB/m6t4vGd4iwRihB3HmK5LOxKqCMjM OXgrstyCpews3I87RNMsxyxZoYDvjsBH53PlI0NmeIAXJHyfa28k3srVy69ghJXRTJov6QxNAGUtc Pgn8ly3nt9RjwszrDOBfH2LriTDeFyDzxzEmYw7+n/AgMuZkmbg/G7p6h/r3bZ+RXlWEloXSXPFDA bl/G5HN9YpuNhOUlEENVkFNVqlu2guE0N6mVeX6O+SJNO7TkyiGBEE518JSyLPm+zhKVX6V4sxsxT xIjg+t6g==; Received: from [37.142.126.90] (port=45456 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.87) (envelope-from ) id 1eU8bx-0003v3-F9; Wed, 27 Dec 2017 12:06:57 +0200 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id A221B48255A; Wed, 27 Dec 2017 12:06:56 +0200 (IST) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id Rw8SZNUrXcpk; Wed, 27 Dec 2017 12:06:56 +0200 (IST) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 0D7CE482559; Wed, 27 Dec 2017 12:06:56 +0200 (IST) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id OwlvZ-nsg3WI; Wed, 27 Dec 2017 12:06:55 +0200 (IST) Received: from compulab.co.il (ilya-linux [192.168.11.24]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id CF9BB482556; Wed, 27 Dec 2017 12:06:55 +0200 (IST) Received: by compulab.co.il (Postfix, from userid 1000) id 96A12940611; Wed, 27 Dec 2017 12:06:54 +0200 (IST) From: Ilya Ledvich To: Richard Zhu , Lucas Stach Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Ilya Ledvich Subject: [PATCH] PCI: imx6: Add PHY reference clock source support Date: Wed, 27 Dec 2017 12:05:54 +0200 Message-Id: <1514369154-21105-1-git-send-email-ilya@compulab.co.il> X-Mailer: git-send-email 1.9.1 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_recent_authed_mail_ips_text_entry: ilya@compulab.co.il|compulab.co.il X-Authenticated-Sender: softlayer.compulab.co.il: ilya@compulab.co.il Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org i.MX7D variant of the IP can use either Crystal Oscillator input or internal clock input as a Reference Clock input for PCIe PHY. Add support for an optional property 'pcie-phy-refclk-internal'. If present then an internal clock input is used as PCIe PHY reference clock source. By default an external oscillator input is still used. Verified on Compulab SBC-iMX7 Single Board Computer. Signed-off-by: Ilya Ledvich Signed-off-by: Ilya Ledvich --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ drivers/pci/dwc/pci-imx6.c | 8 +++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 7b1e48b..f9cf11e 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -50,6 +50,11 @@ Additional required properties for imx7d-pcie: - "pciephy" - "apps" +Additional optional properties for imx7d-pcie: +- pcie-phy-refclk-internal: If present then an internal PLL input is used as + PCIe PHY reference clock source. By default an external ocsillator input + is used. + Example: pcie@0x01000000 { diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c index b734835..a616192 100644 --- a/drivers/pci/dwc/pci-imx6.c +++ b/drivers/pci/dwc/pci-imx6.c @@ -61,6 +61,7 @@ struct imx6_pcie { u32 tx_swing_low; int link_gen; struct regulator *vpcie; + bool pciephy_refclk_sel; }; /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */ @@ -474,7 +475,9 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->variant) { case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + imx6_pcie->pciephy_refclk_sel ? + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL : 0); break; case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -840,6 +843,9 @@ static int imx6_pcie_probe(struct platform_device *pdev) imx6_pcie->vpcie = NULL; } + imx6_pcie->pciephy_refclk_sel = + of_property_read_bool(node, "pcie-phy-refclk-internal"); + platform_set_drvdata(pdev, imx6_pcie); ret = imx6_add_pcie_port(imx6_pcie, pdev);