From patchwork Thu Oct 8 21:39:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 527930 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 54A17140D9B for ; Fri, 9 Oct 2015 08:42:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965121AbbJHVmg (ORCPT ); Thu, 8 Oct 2015 17:42:36 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:24643 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933851AbbJHVmd (ORCPT ); Thu, 8 Oct 2015 17:42:33 -0400 Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id t98LeGP6002144 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 8 Oct 2015 21:40:16 GMT Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0022.oracle.com (8.13.8/8.13.8) with ESMTP id t98LeFfc002684 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Thu, 8 Oct 2015 21:40:16 GMT Received: from abhmp0009.oracle.com (abhmp0009.oracle.com [141.146.116.15]) by userv0121.oracle.com (8.13.8/8.13.8) with ESMTP id t98LeE1M015338; Thu, 8 Oct 2015 21:40:15 GMT Received: from linux-siqj.site (/10.132.127.48) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 08 Oct 2015 14:40:14 -0700 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Wei Yang , TJ , Yijing Wang , Khalid Aziz Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v7 60/60] PCI: Only try to assign io port only for root bus that support it Date: Thu, 8 Oct 2015 14:39:19 -0700 Message-Id: <1444340359-8011-61-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1444340359-8011-1-git-send-email-yinghai@kernel.org> References: <1444340359-8011-1-git-send-email-yinghai@kernel.org> X-Source-IP: aserv0022.oracle.com [141.146.126.234] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PCI subsystem always assumes that I/O is supported on root bus and tries to assign an I/O window to each child bus even if that is not the case. The use cases is on Intel 8 socket system that have 8 root buses, last two root buses would not have io port resources from _CRS. Check if root bus supports I/O, and later during sizing and assigning, check that flags and skip those resources. Signed-off-by: Yinghai Lu --- drivers/pci/probe.c | 6 ++++++ drivers/pci/setup-bus.c | 9 +++++++++ include/linux/pci.h | 1 + 3 files changed, 16 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index f9589d9..d5fca94 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -339,6 +339,9 @@ static void pci_read_bridge_io(struct pci_bus *child) struct pci_bus_region region; struct resource *res; + if (!pci_find_host_bridge(child)->has_ioport) + return; + io_mask = PCI_IO_RANGE_MASK; io_granularity = 0x1000; if (dev->io_window_1k) { @@ -2126,6 +2129,9 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, bus_addr[0] = '\0'; dev_info(&b->dev, "root bus resource %pR%s\n", res, bus_addr); + if (resource_type(res) == IORESOURCE_IO) + bridge->has_ioport = 1; + if (resource_type(res) == IORESOURCE_MEM) { if ((res->end - offset) > 0xffffffff) bridge->has_mem64 = 1; diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 22ee1a1..f4918d7 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -226,6 +226,10 @@ static void pdev_assign_resources_prepare(struct pci_dev *dev, if (resource_disabled(r) || r->parent) continue; + if ((r->flags & IORESOURCE_IO) && + !pci_find_host_bridge(dev->bus)->has_ioport) + continue; + r_align = __pci_resource_alignment(dev, r, realloc_head); if (!r_align) { dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", @@ -1189,6 +1193,11 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, min_size = 0; } + if (!pci_find_host_bridge(bus)->has_ioport) { + b_res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; + return; + } + min_align = window_alignment(bus, IORESOURCE_IO); list_for_each_entry(dev, &bus->devices, bus_list) { int i; diff --git a/include/linux/pci.h b/include/linux/pci.h index 207ee64..e0efaa2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -414,6 +414,7 @@ struct pci_host_bridge { void *release_data; unsigned int ignore_reset_delay:1; /* for entire hierarchy */ unsigned int has_mem64:1; + unsigned int has_ioport:1; }; #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)