From patchwork Fri Sep 11 23:21:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Daney X-Patchwork-Id: 517049 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 316F514012C for ; Sat, 12 Sep 2015 09:23:13 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Xl5TTJdm; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754981AbbIKXWy (ORCPT ); Fri, 11 Sep 2015 19:22:54 -0400 Received: from mail-ig0-f180.google.com ([209.85.213.180]:37051 "EHLO mail-ig0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754988AbbIKXWL (ORCPT ); Fri, 11 Sep 2015 19:22:11 -0400 Received: by igbni9 with SMTP id ni9so49979250igb.0; Fri, 11 Sep 2015 16:22:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NoTCSVfQtYDd4nNz13w3Dbshe67YXjGpMcWUnafVYI0=; b=Xl5TTJdm8AZLHiwvBrpzw7iFvTvsP94Io7XuoeoA+zailv1zsYZpQxwocAhY930cVl d9Gf44rLI3WKTTwT3dcq5z0PlMHx9SjVHZ6z404gi/Y8qVvdocIqfmKABo3tsSKhf198 k/kz5MzDeDBjnBcwLlGeOTn+3Y5xaX+QxguQnCgH83NGtWAxyXUqOKYuCQ5uXtiKdDN/ NOKrbqVXSmNQSMY4rgShsZ45ontNEuN4TkPoLT86WVTVkSAU6SAVlMJ6xp9wLQ3IkTBt 82+QO4TiMxAxHmq/72VpRvQcviIvL0f5bk0tCvJ2vv/VH1nK4+N90Bm9U24XHiJll8jb q4EQ== X-Received: by 10.50.72.19 with SMTP id z19mr942771igu.19.1442013730085; Fri, 11 Sep 2015 16:22:10 -0700 (PDT) Received: from dl.caveonetworks.com (64.2.3.194.ptr.us.xo.net. [64.2.3.194]) by smtp.gmail.com with ESMTPSA id qh9sm645108igb.20.2015.09.11.16.22.05 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 11 Sep 2015 16:22:08 -0700 (PDT) Received: from dl.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dl.caveonetworks.com (8.14.5/8.14.5) with ESMTP id t8BNM46D005066; Fri, 11 Sep 2015 16:22:04 -0700 Received: (from ddaney@localhost) by dl.caveonetworks.com (8.14.5/8.14.5/Submit) id t8BNM4Np005065; Fri, 11 Sep 2015 16:22:04 -0700 From: David Daney To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Frank Rowand , Grant Likely , Bjorn Helgaas , linux-pci@vger.kernel.org, Will Deacon , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-arm-kernel@lists.infradead.org Cc: David Daney Subject: [PATCH 6/6] PCI: generic: Allow bus default MSI controller to be specified. Date: Fri, 11 Sep 2015 16:21:59 -0700 Message-Id: <1442013719-5001-7-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1442013719-5001-1-git-send-email-ddaney.cavm@gmail.com> References: <1442013719-5001-1-git-send-email-ddaney.cavm@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: David Daney If the device tree node for the bus has a "msi-parent" property, use that as the default MSI controller for devices on the bus. Add device tree binding documentation describing the new property. This allows the pci-host-generic driver to be used in systems with multiple MSI controllers. Signed-off-by: David Daney --- .../devicetree/bindings/pci/host-generic-pci.txt | 5 +++++ drivers/pci/host/pci-host-generic.c | 15 +++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.txt b/Documentation/devicetree/bindings/pci/host-generic-pci.txt index cf3e205..daa6942 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.txt +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.txt @@ -29,6 +29,11 @@ Properties of the host controller node: to indicate the range of bus numbers for this controller. If absent, defaults to <0 255> (i.e. all buses). +- msi-parent : Optional property to indicate the MSI controller associated + with devices on the bus. If not present, the default MSI + controller is used. This property is further discussed in + interrupt-controller/msi.txt + - #address-cells : Must be 3. - #size-cells : Must be 2. diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c index 8219c0b..e0248b4 100644 --- a/drivers/pci/host/pci-host-generic.c +++ b/drivers/pci/host/pci-host-generic.c @@ -225,6 +225,7 @@ static int gen_pci_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL); struct pci_bus *bus, *child; + struct msi_controller *msi; if (!pci) return -ENOMEM; @@ -265,8 +266,18 @@ static int gen_pci_probe(struct platform_device *pdev) if (!pci_has_flag(PCI_PROBE_ONLY)) pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS); - bus = pci_scan_root_bus(dev, pci->cfg.bus_range->start, - &pci->cfg.ops.ops, pci, &pci->resources); + msi = NULL; + if (IS_ENABLED(CONFIG_PCI_MSI)) { + struct device_node *msi_node; + + msi_node = of_parse_phandle(np, "msi-parent", 0); + if (msi_node) + msi = of_pci_find_msi_chip_by_node(msi_node); + } + + bus = pci_scan_root_bus_msi(dev, pci->cfg.bus_range->start, + &pci->cfg.ops.ops, pci, &pci->resources, + msi); if (!bus) { dev_err(dev, "Scanning rootbus failed"); return -ENODEV;