From patchwork Tue Jul 24 16:31:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 172950 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C12D32C0080 for ; Wed, 25 Jul 2012 02:39:04 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755878Ab2GXQe3 (ORCPT ); Tue, 24 Jul 2012 12:34:29 -0400 Received: from mail-gh0-f174.google.com ([209.85.160.174]:39041 "EHLO mail-gh0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755796Ab2GXQe2 (ORCPT ); Tue, 24 Jul 2012 12:34:28 -0400 Received: by ghrr11 with SMTP id r11so6851939ghr.19 for ; Tue, 24 Jul 2012 09:34:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ZiwyQmPRoBs+/Ok82hmy1cqvdJAr3h9PvoKNHXgN9VQ=; b=Yi0WHfQz5/NfYzKqRWh9rfpNpZgre+3WyioGkIBuTyLVFrpoYQ5f24+P3rb8a4JVoL g2ZjrARUJA16zNWAMoFiYMBEPrO+V0QENy5EP7TWia4FDytUd0DjDlQIznfiQoiQviL6 miuxzDl979vioE1ngZVIu094s+R2VBx+hrfa5eeAl39YC8kYqUtzZo9pXQUEzBx3UTYt 0dCYdZQaqwO7TB2JaEidUvx8eeiSyAH9XXpmssoiG0vtafAyGv+n9T0I782oTkylT+Gq gBj3hBhszEp9Y6ht+9hCIA/A6cQyzKB1UAQXviyPFc6V9r/9YrVNYqBsoUR1MZTcjswy qtDw== Received: by 10.66.87.138 with SMTP id ay10mr5902299pab.38.1343147667163; Tue, 24 Jul 2012 09:34:27 -0700 (PDT) Received: from localhost.localdomain ([221.221.26.244]) by mx.google.com with ESMTPS id wi6sm12457583pbc.35.2012.07.24.09.34.15 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jul 2012 09:34:24 -0700 (PDT) From: Jiang Liu To: Bjorn Helgaas , Don Dutile Cc: Jiang Liu , Yinghai Lu , Taku Izumi , "Rafael J . Wysocki" , Kenji Kaneshige , Yijing Wang , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jiang Liu Subject: [RFC PATCH v2 07/32] PCI/portdrv: use PCIe capabilities access functions to simplify implementation Date: Wed, 25 Jul 2012 00:31:19 +0800 Message-Id: <1343147504-25891-8-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> References: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jiang Liu Use PCIe capabilities access functions to simplify PCIe portdrv implementation. Signed-off-by: Jiang Liu Signed-off-by: Yijing Wang --- drivers/pci/pcie/portdrv_core.c | 20 ++++++++------------ drivers/pci/pcie/portdrv_pci.c | 7 ++----- 2 files changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index bf320a9..37bff83 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -76,7 +76,6 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) struct msix_entry *msix_entries; int idx[PCIE_PORT_DEVICE_MAXSERVICES]; int nr_entries, status, pos, i, nvec; - u16 reg16; u32 reg32; nr_entries = pci_msix_table_size(dev); @@ -120,9 +119,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) * the value in this field indicates which MSI-X Table entry is * used to generate the interrupt message." */ - pos = pci_pcie_cap(dev); - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); - entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; + entry = (dev->pcie_flags_reg & PCI_EXP_FLAGS_IRQ) >> 9; if (entry >= nr_entries) goto Error; @@ -246,7 +243,7 @@ static void cleanup_service_irqs(struct pci_dev *dev) */ static int get_port_device_capability(struct pci_dev *dev) { - int services = 0, pos; + int services = 0; u16 reg16; u32 reg32; int cap_mask = 0; @@ -265,11 +262,9 @@ static int get_port_device_capability(struct pci_dev *dev) return 0; } - pos = pci_pcie_cap(dev); - pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); /* Hot-Plug Capable */ - if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) { - pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, ®32); + if ((cap_mask & PCIE_PORT_SERVICE_HP)) { + pci_pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); if (reg32 & PCI_EXP_SLTCAP_HPC) { services |= PCIE_PORT_SERVICE_HP; /* @@ -277,10 +272,11 @@ static int get_port_device_capability(struct pci_dev *dev) * enabled by the BIOS and the hot-plug service driver * is not loaded. */ - pos += PCI_EXP_SLTCTL; - pci_read_config_word(dev, pos, ®16); + pci_pcie_capability_read_word(dev, + PCI_EXP_SLTCTL, ®16); reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); - pci_write_config_word(dev, pos, reg16); + pci_pcie_capability_write_word(dev, + PCI_EXP_SLTCTL, reg16); } } /* AER capable */ diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 24d1463..1b2b378 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -64,14 +64,11 @@ __setup("pcie_ports=", pcie_port_setup); */ void pcie_clear_root_pme_status(struct pci_dev *dev) { - int rtsta_pos; u32 rtsta; - rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA; - - pci_read_config_dword(dev, rtsta_pos, &rtsta); + pci_pcie_capability_read_dword(dev, PCI_EXP_RTSTA, &rtsta); rtsta |= PCI_EXP_RTSTA_PME; - pci_write_config_dword(dev, rtsta_pos, rtsta); + pci_pcie_capability_write_dword(dev, PCI_EXP_RTSTA, rtsta); } static int pcie_portdrv_restore_config(struct pci_dev *dev)