From patchwork Thu Dec 12 02:46:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 300496 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C03042C0091 for ; Thu, 12 Dec 2013 13:46:34 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750971Ab3LLCqd (ORCPT ); Wed, 11 Dec 2013 21:46:33 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:41962 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750882Ab3LLCqc (ORCPT ); Wed, 11 Dec 2013 21:46:32 -0500 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MXO0030LADAWLB0@mailout4.samsung.com> for linux-pci@vger.kernel.org; Thu, 12 Dec 2013 11:46:22 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.49]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 51.8A.19199.E7329A25; Thu, 12 Dec 2013 11:46:22 +0900 (KST) X-AuditID: cbfee68d-b7f5c6d000004aff-e6-52a9237e9465 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 28.5A.17171.D7329A25; Thu, 12 Dec 2013 11:46:22 +0900 (KST) Received: from DOJG1HAN03 ([12.23.120.99]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MXO00FPEAD9TS20@mmp2.samsung.com>; Thu, 12 Dec 2013 11:46:21 +0900 (KST) From: Jingoo Han To: 'Marek Vasut' , linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, 'Bjorn Helgaas' , 'Frank Li' , 'Harro Haan' , 'Mohit KUMAR' , 'Pratyush Anand' , 'Richard Zhu' , 'Sascha Hauer' , 'Sean Cross' , 'Shawn Guo' , 'Siva Reddy Kallam' , 'Srikanth T Shivanand' , 'Tim Harvey' , 'Troy Kisky' , 'Yinghai Lu' , 'Jingoo Han' , 'Kishon Vijay Abraham I' References: <1386757818-5154-1-git-send-email-marex@denx.de> In-reply-to: <1386757818-5154-1-git-send-email-marex@denx.de> Subject: Re: [PATCH 1/7] PCI: imx6: Make reset-gpio optional Date: Thu, 12 Dec 2013 11:46:21 +0900 Message-id: <002a01cef6e4$57583ce0$0608b6a0$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac72XBT+9Y200SheQRysHx0rhDUSCwAh72bQ Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLKsWRmVeSWpSXmKPExsVy+t8zQ9065ZVBBrtvCVgsacqweHlI0+LM /PmsFpcXXmK1uPC0h81i0+NrrBZn5x1ns7g/exuzxZu2RkaLjVN/MVq0X1K2eDxL2OLv9k0s Fk/XLWG2WNG0ldHi4olPzBYbD3UwWTQefcBq0frkAaPF/y2f2RxEPB7u5fGYN+sEi8e/w/1M Hud67rJ57Jx1l91jwaZSj02rOtk8vi+cz+5x59oeNo/NS+o9+v8aePRtWcXo8fTHXmaP4ze2 M3l83iQXwB/FZZOSmpNZllqkb5fAlfFz7hX2gl1CFT9mXWVrYJzJ38XIySEhYCLx83MLO4Qt JnHh3nq2LkYuDiGBZYwS1+9OYoMpOtS5gQkiMZ1R4s38VYwQzi9Giemz3zCDVLEJqEl8+XIY bJSIgI3EpxM72EGKmAXWsko8WDgPbJQQUGLllzksXYwcHJwCthLLL2iBhIWBwnun3APrZRFQ lbh6eCEjiM0LVPJq1VU2CFtQ4sfkeywgNrOAlsT6nceZIGx5ic1r3jKDjJQQUJd49FcX4gQj iVmb29kgSkQk9r14B3azhEA/p0RLz1wWiF0CEt8mH2KB6JWV2HSAGeJhSYmDK26wTGCUmIVk 8ywkm2ch2TwLyYoFjCyrGEVTC5ILipPSiwz1ihNzi0vz0vWS83M3MUKSUu8OxtsHrA8xJgOt n8gsJZqcD0xqeSXxhsZmRhamJqbGRuaWZqQJK4nzJj1MChISSE8sSc1OTS1ILYovKs1JLT7E yMTBKdXAmMOwtKp02/1lT+zDNtgoFBl/re/cXbSp+oEul9d1F9eXFjbbhQ1KS/2iK75//c7/ 5cgp56az7OkNkX8mm2RVLD124UvsSo+CWokZasLv5V55ijVOkZnV9MGyV8lgqeJmpqUf7zzX 6wxUY5h+fKPjEcFJi7/m/a/k3MvYv0PYRM7wnMkKLotIJZbijERDLeai4kQAMkot52ADAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrFJsWRmVeSWpSXmKPExsVy+t9jQd065ZVBBjdmcVksacqweHlI0+LM /PmsFpcXXmK1uPC0h81i0+NrrBZn5x1ns7g/exuzxZu2RkaLjVN/MVq0X1K2eDxL2OLv9k0s Fk/XLWG2WNG0ldHi4olPzBYbD3UwWTQefcBq0frkAaPF/y2f2RxEPB7u5fGYN+sEi8e/w/1M Hud67rJ57Jx1l91jwaZSj02rOtk8vi+cz+5x59oeNo/NS+o9+v8aePRtWcXo8fTHXmaP4ze2 M3l83iQXwB/VwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk4hOg 65aZA/SykkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwjjHj59wr7AW7hCp+ zLrK1sA4k7+LkZNDQsBE4lDnBiYIW0ziwr31bF2MXBxCAtMZJd7MX8UI4fxilJg++w0zSBWb gJrEly+H2UFsEQEbiU8ndrCDFDELrGWVeLBwHhtIQggosfLLHJYuRg4OTgFbieUXtEDCwkDh vVPugfWyCKhKXD28kBHE5gUqebXqKhuELSjxY/I9FhCbWUBLYv3O40wQtrzE5jVvmUFGSgio Szz6qwtxgpHErM3tbBAlIhL7XrxjnMAoNAvJpFlIJs1CMmkWkpYFjCyrGEVTC5ILipPScw31 ihNzi0vz0vWS83M3MYJT3jOpHYwrGywOMQpwMCrx8L44uCJIiDWxrLgy9xCjBAezkgjvE6GV QUK8KYmVValF+fFFpTmpxYcYk4EencgsJZqcD0zHeSXxhsYmZkaWRmYWRibm5qQJK4nzHmi1 DhQSSE8sSc1OTS1ILYLZwsTBKdXAaLmrpFhm4f2+hJ77blsOHNnJ+jSkUe3nqbCjoibXGXfl rgyJinL/nGQnludfIntKOPSA/Z+z4hKfeItSTn2e/so0L7W+zKXKS/jVkR0LTS2uW1T+uG2T V5D74LofY76/XW7Um3olf9+dbwoTnWcKBTtX3bpwuy41xVxakGeOfcBZ2UOPubcrsRRnJBpq MRcVJwIADBnXvL0DAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Wednesday, December 11, 2013 7:30 PM, Marek Vasut wrote: > > Some boards do not have a PCIe reset GPIO. To avoid probe > failure on these boards, make the reset GPIO optional as > well. > > Signed-off-by: Marek Vasut > Cc: Bjorn Helgaas > Cc: Frank Li > Cc: Harro Haan > Cc: Jingoo Han > Cc: Mohit KUMAR > Cc: Pratyush Anand > Cc: Richard Zhu > Cc: Sascha Hauer > Cc: Sean Cross > Cc: Shawn Guo > Cc: Siva Reddy Kallam > Cc: Srikanth T Shivanand > Cc: Tim Harvey > Cc: Troy Kisky > Cc: Yinghai Lu > --- > .../devicetree/bindings/pci/designware-pcie.txt | 2 +- > drivers/pci/host/pci-imx6.c | 29 +++++++++++----------- > 2 files changed, 16 insertions(+), 15 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt > b/Documentation/devicetree/bindings/pci/designware-pcie.txt > index d5d26d4..b7a2279 100644 > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt > @@ -19,9 +19,9 @@ Required properties: > to define the mapping of the PCIe interface to interrupt > numbers. > - num-lanes: number of lanes to use > -- reset-gpio: gpio pin number of power good signal > > Optional properties for fsl,imx6q-pcie > +- reset-gpio: gpio pin number of power good signal (+cc Kishon Vijay Abraham I) As I said earlier, 'reset-gpio' property can be used for 'samsung,exynos5440-pcie'. Thus, it is not specific for 'fsl,imx6q-pcie'. Please, modify it as below: Best regards, Jingoo Han --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -19,6 +19,8 @@ Required properties: to define the mapping of the PCIe interface to interrupt numbers. - num-lanes: number of lanes to use + +Optional properties - reset-gpio: gpio pin number of power good signal Optional properties for fsl,imx6q-pcie