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[v4,0/4] AM64: Add PCIe bindings and driver support

Message ID 20210308063550.6227-1-kishon@ti.com
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Series AM64: Add PCIe bindings and driver support | expand

Message

Kishon Vijay Abraham I March 8, 2021, 6:35 a.m. UTC
AM64 uses the same PCIe controller as in J7200, however AM642 EVM
doesn't have a clock generator (unlike J7200 base board). Here
the clock from the SERDES has to be routed to the PCIE connector.
This series provides an option for the pci-j721e.c driver to
drive reference clock output to the connector.

v1 of the patch series can be found @ [1]
v2 of the patch series can be found @ [2]
v3 of the patch series can be found @ [3]

Changes from v3:
*) Added Reviewed by from Rob
*) Incorporated Krzysztof WilczyƄski comment on DT binding documentation
*) Fixed "warn: missing error code 'ret'"

Changes from v2:
*) Fix DT binding documentation suggested by Rob

Changes from v1:
*) Fixed missing initialization of "ret" variable in the error path.

[1] -> http://lore.kernel.org/r/20201224115658.2795-1-kishon@ti.com
[2] -> https://lore.kernel.org/r/20210104124103.30930-1-kishon@ti.com
[3] -> https://lore.kernel.org/r/20210222114030.26445-1-kishon@ti.com

Kishon Vijay Abraham I (4):
  dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the
    connector
  dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64
    SoC
  dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's
    AM64 SoC
  PCI: j721e: Add support to provide refclk to PCIe connector

 .../bindings/pci/ti,j721e-pci-ep.yaml         |  9 ++++----
 .../bindings/pci/ti,j721e-pci-host.yaml       | 20 ++++++++++++-----
 drivers/pci/controller/cadence/pci-j721e.c    | 22 ++++++++++++++++++-
 3 files changed, 40 insertions(+), 11 deletions(-)

Comments

Lorenzo Pieralisi March 23, 2021, 10:35 a.m. UTC | #1
On Mon, 8 Mar 2021 12:05:46 +0530, Kishon Vijay Abraham I wrote:
> AM64 uses the same PCIe controller as in J7200, however AM642 EVM
> doesn't have a clock generator (unlike J7200 base board). Here
> the clock from the SERDES has to be routed to the PCIE connector.
> This series provides an option for the pci-j721e.c driver to
> drive reference clock output to the connector.
> 
> v1 of the patch series can be found @ [1]
> v2 of the patch series can be found @ [2]
> v3 of the patch series can be found @ [3]
> 
> [...]

Applied to pci/cadence, thanks!

[1/4] dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
      https://git.kernel.org/lpieralisi/pci/c/f9875d1a36
[2/4] dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
      https://git.kernel.org/lpieralisi/pci/c/3201f355e9
[3/4] dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
      https://git.kernel.org/lpieralisi/pci/c/6b7d5394c2
[4/4] PCI: j721e: Add support to provide refclk to PCIe connector
      https://git.kernel.org/lpieralisi/pci/c/49e0efdce7

Thanks,
Lorenzo