diff mbox series

[v15,2/8] mtd: spi-nor: core: Shrink the storage size of the flash_info's addr_nbytes

Message ID fe4cfd3586b9a050c6acde7675a43b8a2d47ea8e.1652063152.git.Takahiro.Kuwano@infineon.com
State Superseded
Delegated to: Pratyush Yadav
Headers show
Series mtd: spi-nor: Add support for Infineon s25hl-t/s25hs-t | expand

Commit Message

Takahiro Kuwano May 9, 2022, 10:10 p.m. UTC 
From: Tudor Ambarus <tudor.ambarus@microchip.com>

The maximum number of address bytes in SPI NOR is 4. Shrink the storage
size of the flash_info's addr_nbytes.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/core.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Michael Walle May 12, 2022, 9:22 p.m. UTC | #1 
Am 2022-05-10 00:10, schrieb tkuw584924@gmail.com:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
> 
> The maximum number of address bytes in SPI NOR is 4. Shrink the storage
> size of the flash_info's addr_nbytes.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

I'm not even sure if this actually shrink the size due to
alignments of the members by the compiler, nor do I see any
value in saving one byte. But anyway:

Reviewed-by: Michael Walle <michael@walle.cc>

-michael
Pratyush Yadav May 31, 2022, 11:14 a.m. UTC | #2 
On 10/05/22 07:10AM, tkuw584924@gmail.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
> 
> The maximum number of address bytes in SPI NOR is 4. Shrink the storage
> size of the flash_info's addr_nbytes.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 5fc3d4a8add1..fe7683fe1b4d 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -493,7 +493,7 @@  struct flash_info {
 	unsigned sector_size;
 	u16 n_sectors;
 	u16 page_size;
-	u16 addr_nbytes;
+	u8 addr_nbytes;
 
 	bool parse_sfdp;
 	u16 flags;