From patchwork Wed Aug 18 14:35:55 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 62047 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C7B9EB70D1 for ; Thu, 19 Aug 2010 00:38:10 +1000 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1OljkS-0004jT-9S; Wed, 18 Aug 2010 14:36:12 +0000 Received: from mail-gx0-f177.google.com ([209.85.161.177]) by bombadil.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1OljkC-0004bK-9s; Wed, 18 Aug 2010 14:36:01 +0000 Received: by gxk27 with SMTP id 27so256836gxk.36 for ; Wed, 18 Aug 2010 07:35:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:date:message-id :subject:from:to:content-type; bh=GYApP1F9izPj207CfohdSnEkp1GbQDR2+3GEBZ76b74=; b=MEdWDQ0iBMfPUhZen4duJVeLWWXbP0TvjKchcQwf+tBF+9ZW6xeaycT3EEVE//DaPt ZJGTKIFEPc6nJGF2Qdx4byOgcW5w0odBctEa8WjnD9g4I8DhXbv7GDT61rYW9YdHbCk8 ea9uBDLe6iR6idOmU5GH0xfN1HXh9uLHfPyvg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=bCnW9WC6OXPjQ8pmW1kLEYpHjxSG8kEp/+lLMi82d0UUzVkMLFwkJvyl6+5VtqBiNH LirxxpNxDiZjFnd7dWBGkfyxuOyAKKDWwckCg4PfZMrQAZ0cIiqs6iuXt1/KPlmhEw6s 3x7puNqU/Hj+HQPWnhOWOeO+MXbNQcE5gDrGA= MIME-Version: 1.0 Received: by 10.151.50.14 with SMTP id c14mr315380ybk.344.1282142155299; Wed, 18 Aug 2010 07:35:55 -0700 (PDT) Received: by 10.151.114.1 with HTTP; Wed, 18 Aug 2010 07:35:55 -0700 (PDT) Date: Wed, 18 Aug 2010 22:35:55 +0800 Message-ID: Subject: [PATCH 1/5] pxa3xx_nand: update ns2cycle calculation method From: Haojian Zhuang To: Eric Miao , David Woodhouse , linux-arm-kernel , linux-mtd@lists.infradead.org X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20100818_103556_519290_BCB2A977 X-CRM114-Status: GOOD ( 15.70 ) X-Spam-Score: -0.1 (/) X-Spam-Report: SpamAssassin version 3.3.1 on bombadil.infradead.org summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is freemail (haojian.zhuang[at]gmail.com) -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.161.177 listed in list.dnswl.org] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From 946e6bed3610de3d53e7e1e7ac2ed0d0c1cdd41e Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Tue, 17 Aug 2010 17:24:06 +0800 Subject: [PATCH 1/5] pxa3xx_nand: update ns2cycle calculation method For the original method change from plus 1 to minus 1, this way make the default timing like tCS become 0 after calculation, although we set the timing as 0xa... Change the method to no plus and minus, and make the result closer to what the timing specified in the NAND chip spec. Signed-off-by: Lei Wen --- drivers/mtd/nand/pxa3xx_nand.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index e02fa4f..4d89f37 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -363,7 +363,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = { #define tAR_NDTR1(r) (((r) >> 0) & 0xf) /* convert nano-seconds to nand flash controller clock cycles */ -#define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) - 1) +#define ns2cycle(ns, clk) (int)((ns) * (clk / 1000000) / 1000) /* convert nand flash controller clock cycles to nano-seconds */ #define cycle2ns(c, clk) ((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))