From patchwork Thu Feb 21 21:37:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aaron Sierra X-Patchwork-Id: 222420 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B76EE2C0092 for ; Fri, 22 Feb 2013 08:38:14 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U8dpd-0007sE-Tl; Thu, 21 Feb 2013 21:37:33 +0000 Received: from xes-mad.com ([216.165.139.218]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U8dpa-0007r9-T9 for linux-mtd@lists.infradead.org; Thu, 21 Feb 2013 21:37:31 +0000 Received: from zimbra.xes-mad.com (cal [10.52.0.127]) by xes-mad.com (8.13.8/8.13.8) with ESMTP id r1LLbRD8000454; Thu, 21 Feb 2013 15:37:27 -0600 Date: Thu, 21 Feb 2013 15:37:27 -0600 (CST) From: Aaron Sierra To: Kumar Gala Subject: [PATCH v2 2/3] powerpc/fsl_lbc: Disable UPM interrupt Message-ID: <8c255900-acee-4676-a86e-cb66aa5c777c@zimbra> In-Reply-To: <9972caad-7c5a-4934-9a80-462fb1049973@zimbra> MIME-Version: 1.0 X-Originating-IP: [10.52.0.65] X-Mailer: Zimbra 7.1.3_GA_3346 (ZimbraWebClient - GC24 (Linux)/7.1.3_GA_3346) X-Virus-Scanned: clamav-milter 0.96 at mail X-Virus-Status: Clean X-Spam-Status: No, score=-5.9 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 autolearn=no version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail.xes-mad.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130221_163731_092395_4D9DD63E X-CRM114-Status: UNSURE ( 8.68 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Artem Bityutskiy , linux-mtd@lists.infradead.org, Nate Case , David Woodhouse X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Nate Case We aren't doing anything with the UPM event in the localbus interrupt handler, so there is no point in enabling it. This interrupt was being triggered constantly during UPM NAND flash activity. Signed-off-by: Nate Case --- arch/powerpc/include/asm/fsl_lbc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 19e0cd2..8971a9f 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -137,7 +137,7 @@ struct fsl_lbc_regs { #define LTESR_CLEAR 0xFFFFFFFF #define LTECCR_CLEAR 0xFFFFFFFF #define LTESR_STATUS LTESR_MASK -#define LTEIR_ENABLE LTESR_MASK +#define LTEIR_ENABLE (LTESR_MASK & ~LTESR_UPM) #define LTEDR_ENABLE 0x00000000 __be32 ltedr; /**< Transfer Error Disable Register */ __be32 lteir; /**< Transfer Error Interrupt Register */