Message ID | 60bc9593-445d-47c9-ac47-0b2e2b11756e@linaro.org |
---|---|
State | Accepted |
Delegated to: | Miquel Raynal |
Headers | show |
Series | [GIT,PULL] mtd: spi-nor: changes for v6.7-rc1 | expand |
Hi Tudor, > For SPI NOR we cleaned the flash info entries in order to have > them slimmer and self explanatory. In order to make the entries > as slim as possible, we introduced sane default values so that > the actual flash entries don't need to specify them. We now use > a flexible macro to specify the flash ID instead of the previous > INFOx() macros that had hardcoded ID lengths. > > Instead of: > - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) > - OTP_INFO(256, 3, 0x1000, 0x1000) }, > > We now use: > + .id = SNOR_ID(0xef, 0x80, 0x20), > + .name = "w25q512nwm", > + .otp = SNOR_OTP(256, 3, 0x1000, 0x1000), > > We also removed some flash entries: the very old Catalyst > SPI EEPROMs that were introduced once with the SPI-NOR subsystem, > and a Fujitsu MRAM. Both should use the at25 EEPROM driver. > The latter even has device tree bindings for the at25 driver. > > We made sure that the conversion didn't introduce any unwanted > changes by comparing the .rodata segment before and after the > conversion. The patches landed in linux-next immediately after > v6.6-rc2, we haven't seen any regressions yet. > > Apart of the autumn cleaning we introduced a new flash entry, > at25ff321a, and added block protection support for mt25qu512a. Thanks a lot for adapting the PR text according to Linus' remarks. I'll try to do the same :-) Thanks, Miquèl
Hi Tudor, tudor.ambarus@linaro.org wrote on Wed, 18 Oct 2023 10:26:16 +0300: > Hello! > > Please find the SPI NOR PR for v6.7-rc1 below. Pulled into mtd/next, thanks! Miquèl