@@ -387,4 +387,26 @@ config MTD_NAND_FSL_UPM
Enables support for NAND Flash chips wired onto Freescale
PowerPC
processor localbus with User-Programmable Machine support.
+comment "WARNING: NAND expert options"
+
+config MTD_NAND_MAX_PAGESIZE
+ int "NAND_MAX_PAGESIZE for nand page buffer. Size in KiB"
+ depends on MTD_NAND
+ default "2048"
+ help
+ This allows you to configure the max page size on the nand
driver.
+ Allows you to change the reserved memory for use in the nand
driver.
+ WARNING: This value should not be subject to change without
+ extensive knowledge
+
+config MTD_NAND_MAX_OOBSIZE
+ int "NAND_MAX_OOBSIZE for nand oob buffer. Size in KiB"
+ depends on MTD_NAND
+ default "64"
+ help
+ This allows you to configure the max oob size on the nand
driver.
+ Allows you to change the reserved memory for use in the nand
driver.
+ WARNING: This value should not be subject to change without
+ extensive knowledge
+
endif # MTD_NAND
@@ -45,8 +45,16 @@ extern void nand_wait_ready(struct mtd_info *mtd);
* is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly.
*/
+#ifdef MTD_NAND_MAX_OOBSIZE
+#define NAND_MAX_OOBSIZE CONFIG_MTD_NAND_MAX_OOBSIZE
+#else
#define NAND_MAX_OOBSIZE 64
+#endif
+#ifdef MTD_NAND_MAX_PAGESIZE
+#define NAND_MAX_PAGESIZE CONFIG_MTD_NAND_MAX_PAGESIZE
+#else
#define NAND_MAX_PAGESIZE 2048
+#endif
/*
* Constants for hardware specific CLE/ALE/NCE function
Is it feasible to get acceptance for implementing the two values NAND_MAX_PAGESIZE and max NAND_MAX_OOBSIZE for the nand driver as a more dynamic value? The suggestion here is probably the easiest one and could be wrong for all I know. Please don't chop my head off for trying. I am not experienced in submitting patches Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com> ---