@@ -161,6 +161,63 @@ static int spansion_write_any_reg(struct spi_nor *nor, u32 reg_addr,
reg_val);
}
+/**
+ * spansion_quad_enable_volatile() - enable Quad I/O mode in volatile register.
+ * @nor: pointer to a 'struct spi_nor'
+ * @reg_dummy: number of dummy cycles for register read
+ *
+ * It is recommended to update volatile registers in the field application due
+ * to a risk of the non-volatile registers corruption by power interrupt. This
+ * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable
+ * bit in the CFR1 non-volatile in advance (typically by a Flash programmer
+ * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is
+ * also set during Flash power-up. This function supports multi-die package
+ * parts that require to set the Quad Enable bit in each die.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_quad_enable_volatile(struct spi_nor *nor, u8 reg_dummy)
+{
+ u32 reg_addr = SPINOR_REG_CYPRESS_CFR1V;
+ u8 cfr1v, cfr1v_written;
+ int ret;
+
+ ret = spansion_read_any_reg(nor, reg_addr, nor->addr_width, reg_dummy,
+ &cfr1v);
+ if (ret)
+ return ret;
+
+ if (cfr1v & SPINOR_REG_CYPRESS_CFR1V_QUAD_EN)
+ return 0;
+
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
+ /* Update the Quad Enable bit. */
+ cfr1v |= SPINOR_REG_CYPRESS_CFR1V_QUAD_EN;
+
+ ret = spansion_write_any_reg(nor, reg_addr, nor->addr_width, cfr1v);
+
+ if (ret)
+ return ret;
+
+ cfr1v_written = cfr1v;
+
+ /* Read back and check it. */
+ ret = spansion_read_any_reg(nor, reg_addr, nor->addr_width, reg_dummy,
+ &cfr1v);
+ if (ret)
+ return ret;
+
+ if (cfr1v != cfr1v_written) {
+ dev_err(nor->dev, "CFR1: Read back test failed\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
/**
* spi_nor_cypress_octal_dtr_enable() - Enable octal DTR on Cypress flashes.
* @nor: pointer to a 'struct spi_nor'