From patchwork Wed Apr 9 10:33:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pekon gupta X-Patchwork-Id: 337816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 719A8140161 for ; Wed, 9 Apr 2014 20:34:23 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXpph-0000yM-A6; Wed, 09 Apr 2014 10:34:17 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXppf-0005T1-Nn; Wed, 09 Apr 2014 10:34:15 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WXppZ-0005Rj-2R for linux-mtd@lists.infradead.org; Wed, 09 Apr 2014 10:34:09 +0000 Received: from dbdlxv05.itg.ti.com ([172.24.171.60]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s39AXhCP023578; Wed, 9 Apr 2014 05:33:44 -0500 Received: from DBDE73.ent.ti.com (dbde73.ent.ti.com [172.24.171.98]) by dbdlxv05.itg.ti.com (8.14.3/8.13.8) with ESMTP id s39AXd7D020765; Wed, 9 Apr 2014 16:03:41 +0530 Received: from DBDE04.ent.ti.com ([fe80::21ac:d9f:f810:c8e7]) by DBDE73.ent.ti.com ([fe80::bc19:dc43:44da:7415%27]) with mapi id 14.03.0174.001; Wed, 9 Apr 2014 16:03:39 +0530 From: "Gupta, Pekon" To: Helmut Schaa , "Huang Shijie (b32955@freescale.com)" , Scott Wood Subject: RE: [PATCH] mtd: nand: Disable subpage writes for drivers without ecc->hwctl Thread-Topic: [PATCH] mtd: nand: Disable subpage writes for drivers without ecc->hwctl Thread-Index: AQHPU9UfSe3zCdFXqk+dy5NvcwTFnZsJA2tA//+vYgCAAGDhwA== Date: Wed, 9 Apr 2014 10:33:39 +0000 Message-ID: <20980858CB6D3A4BAE95CA194937D5E73EAC1D89@DBDE04.ent.ti.com> References: <1397034804-27161-1-git-send-email-helmut.schaa@googlemail.com> <20980858CB6D3A4BAE95CA194937D5E73EAC1D46@DBDE04.ent.ti.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.170.142] MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140409_063409_230255_D658101B X-CRM114-Status: GOOD ( 14.35 ) X-Spam-Score: -5.5 (-----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-5.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 1.6 URIBL_SBL Contains an URL's NS IP listed in the SBL blocklist [URIs: ti.com] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Artem Bityutskiy , "linux-mtd@lists.infradead.org" , David Woodhouse X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org >From: Helmut Schaa [mailto:helmut.schaa@googlemail.com] >>On Wed, Apr 9, 2014 at 11:38 AM, Gupta, Pekon wrote: [...] >> >> (1) if chip->ecc.hwctl() and chip->ecc.calculate are not implemented but you >> still want to use subpage write feature, then you need to provide custom >> implementation for chip->ecc.write_subpage(). >> that's same for other interfaces of nand_chip like chip->ecc.write_page(). > >But these don't cause panics :) > because fsl_elbc_nand.c uses custom implementations of chip->ecc.write_page() @@ fsl_elbc_chip_init(...) chip->ecc.write_page = fsl_elbc_write_page; Same needs to be done if subpage write is needed. However, as this is a regression so please check if following patch solves your problem.[1] >> (2) If you don't want to use subpage write feature then just disable it using >> chip->options |= NAND_NO_SUBPAGE_WRITE; >> >> Can you please tell which NAND controller driver is causing this ? >> We need to fix that.. > >This happens with fsl_elbc_nand (while trying to run ubiformat on a >mtd dev) but the >crash was caused by the introduction of nand_write_subpage_hwecc. So, in this >case I think instead of trying to fix every possible driver we should >let the nand core >code handle this issue gracefully. Maybe we could add a WARN_ON_ONCE to >notice which drivers require adjustments. > Yes agree. May be good to keep subpage write disabled by default, as only handful drivers possibly use that. [1] ## ------------ From bfd39102ed6aa99b7ac2b8394a2d12b879fbb4b7 Mon Sep 17 00:00:00 2001 From: Pekon Gupta Date: Wed, 9 Apr 2014 15:51:25 +0530 Subject: [PATCH] mtd: eLBC NAND: disable subpage write support As fsl_elbc_nand do not implement NAND ECC interfaces (like chip->ecc.hwctl(), chip->ecc.calculate, and chip->ecc.correct) So it cannot use default implementation of nand_write_subpage_hwecc() as in nand_base.c. Hence disabling subpage write support till a custom implementation for chip->ecc_write_subpage is added. CC: # 3.10.x+ Signed-off-by: Pekon Gupta --- drivers/mtd/nand/fsl_elbc_nand.c | 1 + 1 file changed, 1 insertion(+) -- 1.8.5.1.163.gd7aced9 ---------------- (looping possible maintainers of this driver Huang Shijie and Scott Wood) with regards, pekon diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index ec549cd..a21252c 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -755,6 +755,7 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) /* set up nand options */ chip->bbt_options = NAND_BBT_USE_FLASH; + chip->options |= NAND_NO_SUBPAGE_WRITE; chip->controller = &elbc_fcm_ctrl->controller; chip->priv = priv;