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Subject: [PATCH v8 13/18] spi: cadence-quadspi: reprogram CS timing on every
chip-select switch
Date: Fri, 21 Aug 2026 17:18:17 +0530
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Content preview: cqspi_configure() only reprogrammed per-device CS timing
(CQSPI_REG_DELAY)
and the non-PHY read-capture register when the clock frequency changed,
not
when the chip-select changed. In a multi-device s [...]
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spi: cadence-quadspi: add PHY tuning support
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diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 940cfb72b946..d4181b501d8d 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1602,10 +1602,19 @@ static void cqspi_configure(struct cqspi_flash_pdata *f_pdata, cqspi_chipselect(f_pdata); } - /* Setup baudrate divisor and delays */ + /* Update baudrate only on clock change. */ if (switch_ck) { cqspi->sclk = sclk; cqspi_config_baudrate_div(cqspi); + } + + /* + * Reprogram per-device CS timing and non-PHY read capture on any + * chip-select or clock switch. Without this, two devices at the same + * frequency would each see the other's timing parameters after a CS + * switch, since the lazy clock-only check would never trigger. + */ + if (switch_cs || switch_ck) { cqspi_delay(f_pdata); if (!cqspi->phy_tuning_active) cqspi_readdata_capture(cqspi, !cqspi->rclk_en, false,
cqspi_configure() only reprogrammed per-device CS timing (CQSPI_REG_DELAY) and the non-PHY read-capture register when the clock frequency changed, not when the chip-select changed. In a multi-device setup where both devices operate at the same frequency, a CS switch leaves the previous device's timing parameters in hardware. Split the update condition: baud rate divisor is updated on clock change only (it is frequency-derived), but the per-device delay and read-capture registers are now updated on any CS or clock switch. Signed-off-by: Santhosh Kumar K <s-k6@ti.com> --- drivers/spi/spi-cadence-quadspi.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)