Message ID | 20250415072756.20046-6-quic_kaushalk@quicinc.com |
---|---|
State | New |
Headers | show
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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Enable QPIC BAM and QPIC NAND devicetree nodes for Qualcomm SDX75-IDP board. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> --- arch/arm64/boot/dts/qcom/sdx75-idp.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) Content analysis details: (-2.8 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_VALIDITY_RPBL_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to Validity was blocked. See https://knowledge.validity.com/hc/en-us/articles/20961730681243 for more information. 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Enable QPIC BAM and QPIC NAND support for SDX75
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On 4/15/25 9:27 AM, Kaushal Kumar wrote: > Enable QPIC BAM and QPIC NAND devicetree nodes for Qualcomm SDX75-IDP > board. > > Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/arch/arm64/boot/dts/qcom/sdx75-idp.dts b/arch/arm64/boot/dts/qcom/sdx75-idp.dts index f1bbe7ab01ab..06cacec3461f 100644 --- a/arch/arm64/boot/dts/qcom/sdx75-idp.dts +++ b/arch/arm64/boot/dts/qcom/sdx75-idp.dts @@ -278,6 +278,24 @@ vdd3-supply = <&vreg_l10b_3p08>; }; +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + nand@0 { + reg = <0>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + /* efs2 partition is secured */ + secure-regions = /bits/ 64 <0x680000 0xb00000>; + }; +}; + &qupv3_id_0 { status = "okay"; };
Enable QPIC BAM and QPIC NAND devicetree nodes for Qualcomm SDX75-IDP board. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> --- arch/arm64/boot/dts/qcom/sdx75-idp.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)