| Message ID | 20250403-winbond-6-14-rc1-octal-v2-19-7846bd88fe83@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | mtd: spinand: Add octal support | expand |
Hi, Miquel, On 4/3/25 10:19 AM, Miquel Raynal wrote: > These chips support single SPI, octal SPI and octal DDR SPI. > > For now, only the SDR protocols are supported. > > Tested with the W35N02JW variant, but the 04 one just has twice more > dies and is described in the same datasheet, so we can reasonably expect > that it will behave identically. > > Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Checked patches 15-19 now, I'm ok with them. When applying, please substitute my Reviewed-by tag with Acked-by for patches from 7 to 21. I explained why in the reply of v2 14/19. Thanks. Cheers, ta
On 03/04/2025 at 11:13:36 +01, Tudor Ambarus <tudor.ambarus@linaro.org> wrote: > Hi, Miquel, > > On 4/3/25 10:19 AM, Miquel Raynal wrote: >> These chips support single SPI, octal SPI and octal DDR SPI. >> >> For now, only the SDR protocols are supported. >> >> Tested with the W35N02JW variant, but the 04 one just has twice more >> dies and is described in the same datasheet, so we can reasonably expect >> that it will behave identically. >> >> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> >> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > Checked patches 15-19 now, I'm ok with them. When applying, please > substitute my Reviewed-by tag with Acked-by for patches from 7 to 21. > I explained why in the reply of v2 14/19. Thanks. Duly noted. I checked the b4 log, I don't understand why it picked your R-by tag on all these commits: $ b4 trailers -Su Finding code-review trailers for 22 commits... Checking change-id "20250214-winbond-6-14-rc1-octal-6f7db6be0204" Grabbing search results from lore.kernel.org Analyzing 52 code-review messages --- + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> https://lore.kernel.org/all/cdc38266-18a9-4eff-bdad-c88b316310b3@linaro.org + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> https://lore.kernel.org/all/4d36e51f-323c-451c-afeb-a6e378e3ed53@linaro.org --- Press Enter to apply these trailers or Ctrl-C to abort mtd: spinand: Use more specific naming for the (dual output) read from cache ops + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the (dual IO) read from cache ops + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the (quad output) read from cache ops + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the (quad IO) read from cache ops + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the program execution op + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the (single) program load op + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Use more specific naming for the (quad) program load op + Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✓ DKIM/linaro.org) + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: winbond: Rename DTR variants + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: winbond: Add support for W35N01JW in single mode + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Define octal read from cache operations + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: winbond: Add octal read support + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: Define octal load to cache operations + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: winbond: Add octal program support + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) mtd: spinand: winbond: Add support for W35N02JW and W35N04JW chips + Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> (✗ DKIM/linaro.org) --- Invoking git-filter-repo to update trailers. New history written in 0.17 seconds... Completely finished after 0.38 seconds. Trailers updated. Thanks, Miquèl
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index c263c9b5affe79a14466bc0e2ef2da53ecfd48cf..19f8dd4a63707e6599068a43fd80dabcd9dd3a57 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -287,6 +287,24 @@ static const struct spinand_info winbond_spinand_table[] = { &update_cache_octal_variants), 0, SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), + SPINAND_INFO("W35N02JW", /* 1.8V */ + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22), + NAND_MEMORG(1, 4096, 128, 64, 512, 10, 2, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants, + &write_cache_octal_variants, + &update_cache_octal_variants), + 0, + SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), + SPINAND_INFO("W35N04JW", /* 1.8V */ + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23), + NAND_MEMORG(1, 4096, 128, 64, 512, 10, 4, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants, + &write_cache_octal_variants, + &update_cache_octal_variants), + 0, + SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL)), /* 2G-bit densities */ SPINAND_INFO("W25M02GV", /* 2x1G-bit 3.3V */ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),