diff mbox series

[v4,2/2] mtd: spi-nor: micron-st: use SFDP table for mt25qu512a

Message ID 20231017074711.12167-2-tudor.ambarus@linaro.org
State Accepted
Delegated to: Ambarus Tudor
Headers show
Series [v4,1/2] mtd: spi-nor: micron-st: enable lock/unlock for mt25qu512a | expand

Commit Message

Tudor Ambarus Oct. 17, 2023, 7:47 a.m. UTC 
From: Mamta Shukla <mamta.shukla@leica-geosystems.com>

Parse SFDP table to get size and functions of mt25qu512a. BFPT wrongly
advertises 16bit SR support and made the locking fail. Add a post BFPT
fixup hook to clear the 16bit SR support.

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/jedec_id
20bb20104400

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/manufacturer
st

cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/partname
mt25qu512a

xxd -p  /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
53464450060101ff00060110300000ff84000102800000ffffffffffffff
ffffffffffffffffffffffffffffffffffffe520fbffffffff1f29eb276b
273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff

md5sum  /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
610efba1647e00ac6db18beb11e84c04
/sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 drivers/mtd/spi-nor/micron-st.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

Comments

Pratyush Yadav Oct. 17, 2023, 3:09 p.m. UTC | #1 
On Tue, Oct 17 2023, Tudor Ambarus wrote:

> From: Mamta Shukla <mamta.shukla@leica-geosystems.com>
>
[...]
> diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
> index 756391c906e5..8920547c12bf 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -180,6 +180,18 @@ static const struct flash_info micron_nor_parts[] = {
>  	},
>  };
>  
> +static int mt25qu512a_post_bfpt_fixup(struct spi_nor *nor,
> +				      const struct sfdp_parameter_header *bfpt_header,
> +				      const struct sfdp_bfpt *bfpt)
> +{
> +	nor->flags &= ~SNOR_F_HAS_16BIT_SR;
> +	return 0;
> +}
> +
> +static struct spi_nor_fixups mt25qu512a_fixups = {
> +	.post_bfpt = mt25qu512a_post_bfpt_fixup,
> +};
> +
>  static const struct flash_info st_nor_parts[] = {
>  	{
>  		.name = "m25p05-nonjedec",
> @@ -407,10 +419,8 @@ static const struct flash_info st_nor_parts[] = {
>  		.name = "mt25qu512a",
>  		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
>  			 SPI_NOR_BP3_SR_BIT6,
> -		.size = SZ_64M,
> -		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> -		.fixup_flags = SPI_NOR_4B_OPCODES,

Hmm, I have missed some recent developments in SPI NOR and I was
confused why you did not add a PARSE_SFDP flag. But now I understand
that you just need to drop the .size parameter and it will automatically
use SFDP. So LGTM.

Reviewed-by: Pratyush Yadav <pratyush@kernel.org>

>  		.mfr_flags = USE_FSR,
> +		.fixups = &mt25qu512a_fixups,
>  	}, {
>  		.id = SNOR_ID(0x20, 0xbb, 0x20),
>  		.name = "n25q512a",
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 756391c906e5..8920547c12bf 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -180,6 +180,18 @@  static const struct flash_info micron_nor_parts[] = {
 	},
 };
 
+static int mt25qu512a_post_bfpt_fixup(struct spi_nor *nor,
+				      const struct sfdp_parameter_header *bfpt_header,
+				      const struct sfdp_bfpt *bfpt)
+{
+	nor->flags &= ~SNOR_F_HAS_16BIT_SR;
+	return 0;
+}
+
+static struct spi_nor_fixups mt25qu512a_fixups = {
+	.post_bfpt = mt25qu512a_post_bfpt_fixup,
+};
+
 static const struct flash_info st_nor_parts[] = {
 	{
 		.name = "m25p05-nonjedec",
@@ -407,10 +419,8 @@  static const struct flash_info st_nor_parts[] = {
 		.name = "mt25qu512a",
 		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
 			 SPI_NOR_BP3_SR_BIT6,
-		.size = SZ_64M,
-		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
-		.fixup_flags = SPI_NOR_4B_OPCODES,
 		.mfr_flags = USE_FSR,
+		.fixups = &mt25qu512a_fixups,
 	}, {
 		.id = SNOR_ID(0x20, 0xbb, 0x20),
 		.name = "n25q512a",