diff mbox series

[v2,2/3] mtd: rawnand: Prepare the late addition of supported operation checks

Message ID 20230112093637.987838-3-miquel.raynal@bootlin.com
State Accepted
Headers show
Series mtd: rawnand: Sequential page reads | expand

Commit Message

Miquel Raynal Jan. 12, 2023, 9:36 a.m. UTC
Add an empty envelope just to show how to add additional checks for new
operations. This is going to be used for sequential cached reads, which
require the page size to be known (and the discovery to be over), hence
the "late" designation.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/raw/nand_base.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Miquel Raynal Jan. 13, 2023, 4:36 p.m. UTC | #1
On Thu, 2023-01-12 at 09:36:36 UTC, Miquel Raynal wrote:
> Add an empty envelope just to show how to add additional checks for new
> operations. This is going to be used for sequential cached reads, which
> require the page size to be known (and the discovery to be over), hence
> the "late" designation.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next.

Miquel
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 83bfb1ba2fa3..34395d5d3a47 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5009,6 +5009,14 @@  static void rawnand_early_check_supported_ops(struct nand_chip *chip)
 	rawnand_check_data_only_read_support(chip);
 }
 
+static void rawnand_late_check_supported_ops(struct nand_chip *chip)
+{
+	/* The supported_op fields should not be set by individual drivers */
+
+	if (!nand_has_exec_op(chip))
+		return;
+}
+
 /*
  * Get the flash and manufacturer id and lookup if the type is supported.
  */
@@ -6345,6 +6353,8 @@  static int nand_scan_tail(struct nand_chip *chip)
 			goto err_free_interface_config;
 	}
 
+	rawnand_late_check_supported_ops(chip);
+
 	/*
 	 * Look for secure regions in the NAND chip. These regions are supposed
 	 * to be protected by a secure element like Trustzone. So the read/write