| Message ID | 20221219024019.31974-9-xiangsheng.hou@mediatek.com |
|---|---|
| State | Changes Requested |
| Headers | show
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From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger
<richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Rob Herring
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CC: Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
<linux-mtd@lists.infradead.org>, <devicetree@vger.kernel.org>,
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<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<benliang.zhao@mediatek.com>, <bin.zhang@mediatek.com>, "AngeloGioacchino Del
Regno" <angelogioacchino.delregno@collabora.com>
Subject: [PATCH v5 08/10] arm64: dts: mediatek: Fix existing NAND controller
node name
Date: Mon, 19 Dec 2022 10:40:17 +0800
Message-ID: <20221219024019.31974-9-xiangsheng.hou@mediatek.com>
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Content preview: Change the existing node name in order to match NAND
controller
DT bindings. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
--- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 2 +- arch/ [...]
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|
| Series |
Add MediaTek MT7986 SPI NAND and ECC support
|
expand
|
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 92212cddd37e..cfbec2a2ed9d 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -560,7 +560,7 @@ spi0: spi@1100a000 { status = "disabled"; }; - nandc: nfi@1100e000 { + nandc: nand-controller@1100e000 { compatible = "mediatek,mt2712-nfc"; reg = <0 0x1100e000 0 0x1000>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 146e18b5b1f4..d98aa4936092 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -539,7 +539,7 @@ bluetooth { }; }; - nandc: nfi@1100d000 { + nandc: nand-controller@1100d000 { compatible = "mediatek,mt7622-nfc"; reg = <0 0x1100D000 0 0x1000>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;