Message ID | 20220105135734.271313-2-christophe.kerello@foss.st.com |
---|---|
State | Changes Requested |
Delegated to: | Miquel Raynal |
Headers | show |
Series | mtd: rawnand: stm32_fmc2: Add NAND Write Protect support | expand |
On Wed, 05 Jan 2022 14:57:32 +0100, Christophe Kerello wrote: > A few drivers use this property to describe the GPIO pin used to protect > the NAND during program/erase operations. > > Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> > --- > Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++ > 1 file changed, 7 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index bd217e6f5018..53b21aed0ac5 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -154,6 +154,13 @@ patternProperties: Ready/Busy pins. Active state refers to the NAND ready state and should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. + wp-gpios: + description: + Contains one GPIO descriptor for the Write Protect pin. + Active state refers to the NAND Write Protect state and should be + set to GPIOD_ACTIVE_LOW unless the signal is inverted. + maxItems: 1 + secure-regions: $ref: /schemas/types.yaml#/definitions/uint64-matrix description:
A few drivers use this property to describe the GPIO pin used to protect the NAND during program/erase operations. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> --- Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++ 1 file changed, 7 insertions(+)