| Message ID | 20211227013542.1240124-1-vincent@systemli.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | mtd: spi-nor: fix reading/writing of MX25L6405D | expand |
Hi Nick, On 12/27/21 02:35, vincent@systemli.org wrote: > From: Nick Hainke <vincent@systemli.org> > > Macronix MX25L6405D supports locking with four block protection bits in > its status register. Furthermore, the chip will not work with the "16-bit > Write Status (01h) Command". Add flash-specific fixup that disables the > SNOR_F_HAS_16BIT_SR flag. As briefly noted on IRC - all Macronix flash chips do seem to only have one status register. So removing the SNOR_F_HAS_16BIT_SR flag in macronix_default_init is probably the better fix. Best David > > Tested on Nanostation M2 XM. > > Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on > lock()/unlock()") > > Signed-off-by: David Bauer <mail@david-bauer.net> > Signed-off-by: Nick Hainke <vincent@systemli.org> > --- > drivers/mtd/spi-nor/macronix.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 27498ed0cc0d..6dd148e9f660 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -8,6 +8,15 @@ > > #include "core.h" > > +static void mx25l6405d_default_init_fixups(struct spi_nor *nor) > +{ > + nor->flags &= ~SNOR_F_HAS_16BIT_SR; > +} > + > +static struct spi_nor_fixups mx25l6405d_fixups = { > + .default_init = mx25l6405d_default_init_fixups, > +}; > + > static int > mx25l25635_post_bfpt_fixups(struct spi_nor *nor, > const struct sfdp_parameter_header *bfpt_header, > @@ -41,7 +50,9 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K | > + SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) > + .fixups = &mx25l6405d_fixups }, > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ |
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 27498ed0cc0d..6dd148e9f660 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -8,6 +8,15 @@ #include "core.h" +static void mx25l6405d_default_init_fixups(struct spi_nor *nor) +{ + nor->flags &= ~SNOR_F_HAS_16BIT_SR; +} + +static struct spi_nor_fixups mx25l6405d_fixups = { + .default_init = mx25l6405d_default_init_fixups, +}; + static int mx25l25635_post_bfpt_fixups(struct spi_nor *nor, const struct sfdp_parameter_header *bfpt_header, @@ -41,7 +50,9 @@ static const struct flash_info macronix_parts[] = { { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) + .fixups = &mx25l6405d_fixups }, { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ |