diff mbox series

[v23,08/18] dt-binding: memory: pl353-smc: Enhance the description of the reg property

Message ID 20210610082040.2075611-9-miquel.raynal@bootlin.com
State New
Headers show
Series ARM Primecell PL35x support | expand

Commit Message

Miquel Raynal June 10, 2021, 8:20 a.m. UTC
The SMC bus controller features several register sets. The one pointed
by the reg property is for the SMC configuration (impacts the
sub-controllers configuration), while the others are meant to be used to
send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND
device). Detail this a little bit for the sake of clarity.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/memory-controllers/pl353-smc.txt       | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Rob Herring June 10, 2021, 3:53 p.m. UTC | #1
On Thu, Jun 10, 2021 at 10:20:30AM +0200, Miquel Raynal wrote:
> The SMC bus controller features several register sets. The one pointed
> by the reg property is for the SMC configuration (impacts the
> sub-controllers configuration), while the others are meant to be used to
> send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND
> device). Detail this a little bit for the sake of clarity.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  .../devicetree/bindings/memory-controllers/pl353-smc.txt       | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> index ecd46856f139..ba6a5426f62b 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> @@ -5,7 +5,8 @@ of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
>  
>  Required properties:
>  - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
> -- reg			: Controller registers map and length.
> +- reg			: SMC controller and sub-controllers configuration
> +			  registers.

I think you could just drop this patch. Otherwise, this doesn't match 
what's now in the yaml file.

Rob
Miquel Raynal June 10, 2021, 4:01 p.m. UTC | #2
Hi Rob, Krzysztof,

Rob Herring <robh@kernel.org> wrote on Thu, 10 Jun 2021 10:53:45 -0500:

> On Thu, Jun 10, 2021 at 10:20:30AM +0200, Miquel Raynal wrote:
> > The SMC bus controller features several register sets. The one pointed
> > by the reg property is for the SMC configuration (impacts the
> > sub-controllers configuration), while the others are meant to be used to
> > send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND
> > device). Detail this a little bit for the sake of clarity.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  .../devicetree/bindings/memory-controllers/pl353-smc.txt       | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > index ecd46856f139..ba6a5426f62b 100644
> > --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
> > @@ -5,7 +5,8 @@ of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
> >  
> >  Required properties:
> >  - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
> > -- reg			: Controller registers map and length.
> > +- reg			: SMC controller and sub-controllers configuration
> > +			  registers.  
> 
> I think you could just drop this patch. Otherwise, this doesn't match 
> what's now in the yaml file.

Fine.

Krzysztof, if it's still time you can just take patch 9 which Rob
just acked and forget about this one. I think we'll be good. Otherwise
that will be for the next MW ;)

Thanks,
Miquèl
Krzysztof Kozlowski June 10, 2021, 9:12 p.m. UTC | #3
On 10/06/2021 18:01, Miquel Raynal wrote:
> Hi Rob, Krzysztof,
> 
> Rob Herring <robh@kernel.org> wrote on Thu, 10 Jun 2021 10:53:45 -0500:
> 
>> On Thu, Jun 10, 2021 at 10:20:30AM +0200, Miquel Raynal wrote:
>>> The SMC bus controller features several register sets. The one pointed
>>> by the reg property is for the SMC configuration (impacts the
>>> sub-controllers configuration), while the others are meant to be used to
>>> send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND
>>> device). Detail this a little bit for the sake of clarity.
>>>
>>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>>> ---
>>>  .../devicetree/bindings/memory-controllers/pl353-smc.txt       | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
>>> index ecd46856f139..ba6a5426f62b 100644
>>> --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
>>> @@ -5,7 +5,8 @@ of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
>>>  
>>>  Required properties:
>>>  - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
>>> -- reg			: Controller registers map and length.
>>> +- reg			: SMC controller and sub-controllers configuration
>>> +			  registers.  
>>
>> I think you could just drop this patch. Otherwise, this doesn't match 
>> what's now in the yaml file.
> 
> Fine.
> 
> Krzysztof, if it's still time you can just take patch 9 which Rob
> just acked and forget about this one. I think we'll be good. Otherwise
> that will be for the next MW ;)

I skipped this one but took dtschema (9/18) so it should be in
tomorrow's linux-next.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
index ecd46856f139..ba6a5426f62b 100644
--- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt
@@ -5,7 +5,8 @@  of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR).
 
 Required properties:
 - compatible		: Should be "arm,pl353-smc-r2p1", "arm,primecell".
-- reg			: Controller registers map and length.
+- reg			: SMC controller and sub-controllers configuration
+			  registers.
 - clock-names		: List of input clock names - "memclk", "apb_pclk"
 			  (See clock bindings for details).
 - clocks		: Clock phandles (see clock bindings for details).