| Message ID | 20210521194034.15249-2-michael@walle.cc |
|---|---|
| State | Superseded |
| Delegated to: | Vignesh R |
| Headers | show |
| Series | mtd: spi-nor: otp: 4 byte mode fix and erase support | expand |
On 5/21/21 10:40 PM, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > The security registers either take a 3 byte or a 4 byte address offset, > depending on the address mode of the flash. Thus just leave the > nor->addr_width as is. > > Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes") > Signed-off-by: Michael Walle <michael@walle.cc> > Acked-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/otp.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c > index 61036c716abb..91a4c510ed51 100644 > --- a/drivers/mtd/spi-nor/otp.c > +++ b/drivers/mtd/spi-nor/otp.c > @@ -40,7 +40,6 @@ int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf) > rdesc = nor->dirmap.rdesc; > > nor->read_opcode = SPINOR_OP_RSECR; > - nor->addr_width = 3; > nor->read_dummy = 8; > nor->read_proto = SNOR_PROTO_1_1_1; > nor->dirmap.rdesc = NULL; > @@ -84,7 +83,6 @@ int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, > wdesc = nor->dirmap.wdesc; > > nor->program_opcode = SPINOR_OP_PSECR; > - nor->addr_width = 3; > nor->write_proto = SNOR_PROTO_1_1_1; > nor->dirmap.wdesc = NULL; > > -- > 2.20.1 >
diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c index 61036c716abb..91a4c510ed51 100644 --- a/drivers/mtd/spi-nor/otp.c +++ b/drivers/mtd/spi-nor/otp.c @@ -40,7 +40,6 @@ int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf) rdesc = nor->dirmap.rdesc; nor->read_opcode = SPINOR_OP_RSECR; - nor->addr_width = 3; nor->read_dummy = 8; nor->read_proto = SNOR_PROTO_1_1_1; nor->dirmap.rdesc = NULL; @@ -84,7 +83,6 @@ int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, wdesc = nor->dirmap.wdesc; nor->program_opcode = SPINOR_OP_PSECR; - nor->addr_width = 3; nor->write_proto = SNOR_PROTO_1_1_1; nor->dirmap.wdesc = NULL;
The security registers either take a 3 byte or a 4 byte address offset, depending on the address mode of the flash. Thus just leave the nor->addr_width as is. Fixes: cad3193fe9d1 ("mtd: spi-nor: implement OTP support for Winbond and similar flashes") Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/otp.c | 2 -- 1 file changed, 2 deletions(-)