diff mbox series

[v2] mtd: spi-nor: Fix address width on flash chips > 16MB

Message ID 20201004213204.11584-1-bert@biot.com
State Superseded
Delegated to: Vignesh R
Headers show
Series [v2] mtd: spi-nor: Fix address width on flash chips > 16MB | expand

Commit Message

Bert Vermeulen Oct. 4, 2020, 9:32 p.m. UTC
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.

Signed-off-by: Bert Vermeulen <bert@biot.com>
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Tudor Ambarus Oct. 6, 2020, 11:44 a.m. UTC | #1
On 10/5/20 12:32 AM, Bert Vermeulen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> 
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
> 
the problem was uncovered with commit f9acd7fa80be, so maybe a Fixes tag
will help.

Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>

We can have this automatically in the stable tree by adding the tag:

Cc: stable@vger.kernel.org

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

> ---
>  drivers/mtd/spi-nor/core.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>                 /* already configured from SFDP */
>         } else if (nor->info->addr_width) {
>                 nor->addr_width = nor->info->addr_width;
> -       } else if (nor->mtd.size > 0x1000000) {
> -               /* enable 4-byte addressing if the device exceeds 16MiB */
> -               nor->addr_width = 4;
>         } else {
>                 nor->addr_width = 3;
>         }
> 
> +       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> +               /* enable 4-byte addressing if the device exceeds 16MiB */
> +               nor->addr_width = 4;
> +       }
> +
>         if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>                 dev_dbg(nor->dev, "address width is too large: %u\n",
>                         nor->addr_width);
> --
> 2.17.1
>
Joel Stanley Oct. 7, 2020, 1:51 a.m. UTC | #2
On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Signed-off-by: Bert Vermeulen <bert@biot.com>

After replying to the other thread, I just saw this one.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>

Thanks Bert!

Cheers,

Joel

> ---
>  drivers/mtd/spi-nor/core.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>                 /* already configured from SFDP */
>         } else if (nor->info->addr_width) {
>                 nor->addr_width = nor->info->addr_width;
> -       } else if (nor->mtd.size > 0x1000000) {
> -               /* enable 4-byte addressing if the device exceeds 16MiB */
> -               nor->addr_width = 4;
>         } else {
>                 nor->addr_width = 3;
>         }
>
> +       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> +               /* enable 4-byte addressing if the device exceeds 16MiB */
> +               nor->addr_width = 4;
> +       }
> +
>         if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>                 dev_dbg(nor->dev, "address width is too large: %u\n",
>                         nor->addr_width);
> --
> 2.17.1
>
Cédric Le Goater Oct. 7, 2020, 5:44 a.m. UTC | #3
On 10/7/20 3:51 AM, Joel Stanley wrote:
> On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>>
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Signed-off-by: Bert Vermeulen <bert@biot.com>
> 
> After replying to the other thread, I just saw this one.
> 
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> Tested-by: Joel Stanley <joel@jms.id.au>
> 
> Thanks Bert!


Yes. I was starting to add bfpt-fixups for all chips we use on Aspeed 
based system.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C. 



> Cheers,
> 
> Joel
> 
>> ---
>>  drivers/mtd/spi-nor/core.c | 8 +++++---
>>  1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>>                 /* already configured from SFDP */
>>         } else if (nor->info->addr_width) {
>>                 nor->addr_width = nor->info->addr_width;
>> -       } else if (nor->mtd.size > 0x1000000) {
>> -               /* enable 4-byte addressing if the device exceeds 16MiB */
>> -               nor->addr_width = 4;
>>         } else {
>>                 nor->addr_width = 3;
>>         }
>>
>> +       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
>> +               /* enable 4-byte addressing if the device exceeds 16MiB */
>> +               nor->addr_width = 4;
>> +       }
>> +
>>         if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>>                 dev_dbg(nor->dev, "address width is too large: %u\n",
>>                         nor->addr_width);
>> --
>> 2.17.1
>>
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@  static int spi_nor_set_addr_width(struct spi_nor *nor)
 		/* already configured from SFDP */
 	} else if (nor->info->addr_width) {
 		nor->addr_width = nor->info->addr_width;
-	} else if (nor->mtd.size > 0x1000000) {
-		/* enable 4-byte addressing if the device exceeds 16MiB */
-		nor->addr_width = 4;
 	} else {
 		nor->addr_width = 3;
 	}
 
+	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+		/* enable 4-byte addressing if the device exceeds 16MiB */
+		nor->addr_width = 4;
+	}
+
 	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
 		dev_dbg(nor->dev, "address width is too large: %u\n",
 			nor->addr_width);