diff mbox series

[1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag

Message ID 20200427072453.375642-1-boris.brezillon@collabora.com
State Changes Requested
Delegated to: Miquel Raynal
Headers show
Series [1/3] mtd: rawnand: Add a NAND_NO_BBM_QUIRK flag | expand

Commit Message

Boris Brezillon April 27, 2020, 7:24 a.m. UTC
Some controllers with embedded ECC engines override the BBM marker with
data or ECC bytes, thus making bad block detection through bad block
marker impossible. Let's flag those chips so the core knows it shouldn't
check the BBM and consider all blocks good.

This should allow us to get rid of two implementers of the
legacy.block_bad() hook.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
---
 drivers/mtd/nand/raw/nand_base.c | 3 +++
 include/linux/mtd/rawnand.h      | 8 ++++++++
 2 files changed, 11 insertions(+)

Comments

Boris Brezillon April 27, 2020, 7:28 a.m. UTC | #1
On Mon, 27 Apr 2020 09:24:51 +0200
Boris Brezillon <boris.brezillon@collabora.com> wrote:

> Some controllers with embedded ECC engines override the BBM marker with
> data or ECC bytes, thus making bad block detection through bad block
> marker impossible. Let's flag those chips so the core knows it shouldn't
> check the BBM and consider all blocks good.
> 
> This should allow us to get rid of two implementers of the
> legacy.block_bad() hook.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/nand_base.c | 3 +++
>  include/linux/mtd/rawnand.h      | 8 ++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index f81b54634061..749ef0b40684 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
>  
>  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
>  {
> +	if (chip->options & NAND_NO_BBM_QUIRK)
> +		return 0;
> +
>  	if (chip->legacy.block_bad)
>  		return chip->legacy.block_bad(chip, ofs);
>  
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 99f4ac47c8d3..37613dd9e04b 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -222,6 +222,14 @@ enum nand_ecc_algo {
>   */
>  #define NAND_KEEP_TIMINGS	0x00800000
>  
> +/*
> + * Some controllers with pipelined ECC engines override the BBM marker with
> + * data or ECC bytes, thus making bad block detection through bad block marker
> + * impossible. Let's flag those chips so the core knows it shouldn't check the
> + * BBM and consider all blocks good.
> + */
> +#define NAND_NO_BBM_QUIRK	0

Oops, should be 

#define NAND_NO_BBM_QUIRK	0x08000000

I'll have to rebase it on Miquel's series re-ordering the flag
definitions and using the BIT() macro anyway. But please don't take this
as an excuse for not reviewing this version :P.

> +
>  /* Cell info constants */
>  #define NAND_CI_CHIPNR_MSK	0x03
>  #define NAND_CI_CELLTYPE_MSK	0x0C
Miquel Raynal April 27, 2020, 7:26 p.m. UTC | #2
Hi Boris,

Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:24:51 +0200:

> Some controllers with embedded ECC engines override the BBM marker with
> data or ECC bytes, thus making bad block detection through bad block
> marker impossible. Let's flag those chips so the core knows it shouldn't
> check the BBM and consider all blocks good.
> 
> This should allow us to get rid of two implementers of the
> legacy.block_bad() hook.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  drivers/mtd/nand/raw/nand_base.c | 3 +++
>  include/linux/mtd/rawnand.h      | 8 ++++++++
>  2 files changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index f81b54634061..749ef0b40684 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
>  
>  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
>  {
> +	if (chip->options & NAND_NO_BBM_QUIRK)
> +		return 0;
> +
>  	if (chip->legacy.block_bad)
>  		return chip->legacy.block_bad(chip, ofs);
>  
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 99f4ac47c8d3..37613dd9e04b 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -222,6 +222,14 @@ enum nand_ecc_algo {
>   */
>  #define NAND_KEEP_TIMINGS	0x00800000
>  
> +/*
> + * Some controllers with pipelined ECC engines override the BBM marker with
> + * data or ECC bytes, thus making bad block detection through bad block marker
> + * impossible. Let's flag those chips so the core knows it shouldn't check the
> + * BBM and consider all blocks good.
> + */
> +#define NAND_NO_BBM_QUIRK	0

Zero? :)

Maybe we'll have to rebase this patch on top of the recent cleanup of
this portion, so that we define a nand_controller flag directly.

We'll see how it goes for the other series, I'll keep this change in
mind.

> +
>  /* Cell info constants */
>  #define NAND_CI_CHIPNR_MSK	0x03
>  #define NAND_CI_CELLTYPE_MSK	0x0C


Thanks,
Miquèl
Miquel Raynal April 27, 2020, 7:30 p.m. UTC | #3
Boris Brezillon <boris.brezillon@collabora.com> wrote on Mon, 27 Apr
2020 09:28:36 +0200:

> On Mon, 27 Apr 2020 09:24:51 +0200
> Boris Brezillon <boris.brezillon@collabora.com> wrote:
> 
> > Some controllers with embedded ECC engines override the BBM marker with
> > data or ECC bytes, thus making bad block detection through bad block
> > marker impossible. Let's flag those chips so the core knows it shouldn't
> > check the BBM and consider all blocks good.
> > 
> > This should allow us to get rid of two implementers of the
> > legacy.block_bad() hook.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> > ---
> >  drivers/mtd/nand/raw/nand_base.c | 3 +++
> >  include/linux/mtd/rawnand.h      | 8 ++++++++
> >  2 files changed, 11 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index f81b54634061..749ef0b40684 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -345,6 +345,9 @@ static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
> >  
> >  static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
> >  {
> > +	if (chip->options & NAND_NO_BBM_QUIRK)
> > +		return 0;
> > +
> >  	if (chip->legacy.block_bad)
> >  		return chip->legacy.block_bad(chip, ofs);
> >  
> > diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> > index 99f4ac47c8d3..37613dd9e04b 100644
> > --- a/include/linux/mtd/rawnand.h
> > +++ b/include/linux/mtd/rawnand.h
> > @@ -222,6 +222,14 @@ enum nand_ecc_algo {
> >   */
> >  #define NAND_KEEP_TIMINGS	0x00800000
> >  
> > +/*
> > + * Some controllers with pipelined ECC engines override the BBM marker with
> > + * data or ECC bytes, thus making bad block detection through bad block marker
> > + * impossible. Let's flag those chips so the core knows it shouldn't check the
> > + * BBM and consider all blocks good.
> > + */
> > +#define NAND_NO_BBM_QUIRK	0  
> 
> Oops, should be 
> 
> #define NAND_NO_BBM_QUIRK	0x08000000
> 
> I'll have to rebase it on Miquel's series re-ordering the flag
> definitions and using the BIT() macro anyway. But please don't take this
> as an excuse for not reviewing this version :P.

Hehe, what did you say again about great minds? :)
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index f81b54634061..749ef0b40684 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -345,6 +345,9 @@  static int nand_block_bad(struct nand_chip *chip, loff_t ofs)
 
 static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs)
 {
+	if (chip->options & NAND_NO_BBM_QUIRK)
+		return 0;
+
 	if (chip->legacy.block_bad)
 		return chip->legacy.block_bad(chip, ofs);
 
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 99f4ac47c8d3..37613dd9e04b 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -222,6 +222,14 @@  enum nand_ecc_algo {
  */
 #define NAND_KEEP_TIMINGS	0x00800000
 
+/*
+ * Some controllers with pipelined ECC engines override the BBM marker with
+ * data or ECC bytes, thus making bad block detection through bad block marker
+ * impossible. Let's flag those chips so the core knows it shouldn't check the
+ * BBM and consider all blocks good.
+ */
+#define NAND_NO_BBM_QUIRK	0
+
 /* Cell info constants */
 #define NAND_CI_CHIPNR_MSK	0x03
 #define NAND_CI_CELLTYPE_MSK	0x0C