| Message ID | 20200121200011.32296-2-kdasu.kdev@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Miquel Raynal |
| Headers | show |
| Series | [V2,1/3] dt: bindings: brcmnand: Add support for flash-edu | expand |
On 1/21/20 12:00 PM, Kamal Dasu wrote: > Nand controller v5.0 and v6.0 have nand edu blocks that enable > dma nand flash transfers. This allows for faster read and write > access. > > Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Hi Kamal, On Tue, Jan 21, 2020 at 03:00:07PM -0500, Kamal Dasu wrote: > Nand controller v5.0 and v6.0 have nand edu blocks that enable > dma nand flash transfers. This allows for faster read and write > access. > > Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> > --- > arch/mips/boot/dts/brcm/bcm7425.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi > index 410e61ebaf9e..aa0b2d39c902 100644 > --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi > +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi > @@ -403,8 +403,8 @@ > compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; > #address-cells = <1>; > #size-cells = <0>; > - reg-names = "nand"; > - reg = <0x41b800 0x400>; > + reg-names = "nand", "flash-edu"; > + reg = <0x41b800 0x400>, <0x41bc00 0x24>; > interrupt-parent = <&hif_l2_intc>; > interrupts = <24>; > status = "disabled"; I wasn't copied on the rest of the series, but presuming patch 1 documents flash-edu in the binding documentation at Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt: Acked-by: Paul Burton <paulburton@kernel.org> Thanks, Paul
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi index 410e61ebaf9e..aa0b2d39c902 100644 --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi @@ -403,8 +403,8 @@ compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; #address-cells = <1>; #size-cells = <0>; - reg-names = "nand"; - reg = <0x41b800 0x400>; + reg-names = "nand", "flash-edu"; + reg = <0x41b800 0x400>, <0x41bc00 0x24>; interrupt-parent = <&hif_l2_intc>; interrupts = <24>; status = "disabled";
Nand controller v5.0 and v6.0 have nand edu blocks that enable dma nand flash transfers. This allows for faster read and write access. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)