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Wed, 17 Jul 2019 08:48:16 +0000 From: To: , Subject: [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Thread-Topic: [PATCH 5/5] mtd: spi-nor: add Kconfig option to disable write protection at power-up Thread-Index: AQHVPHxf57xp/vrlsEWVvsFB8NifHg== Date: Wed, 17 Jul 2019 08:48:16 +0000 Message-ID: <20190717084745.19322-6-tudor.ambarus@microchip.com> References: <20190717084745.19322-1-tudor.ambarus@microchip.com> In-Reply-To: <20190717084745.19322-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1P195CA0085.EURP195.PROD.OUTLOOK.COM (2603:10a6:802:59::38) To BN6PR11MB1842.namprd11.prod.outlook.com (2603:10b6:404:101::18) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.9.5 x-originating-ip: [94.177.32.154] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3ba4e511-15fb-4a3a-7210-08d70a938254 x-microsoft-antispam: BCL:0; PCL:0; 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X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.149.84 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tudor.Ambarus@microchip.com, richard@nod.at, linux-kernel@vger.kernel.org, Nicolas.Ferre@microchip.com, boris.brezillon@collabora.com, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, computersforpeace@gmail.com, dwmw2@infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Tudor Ambarus Some spi-nor flashes come write protected by default after a power-on sequence to avoid destructing commands (erase, write) during power-up. Backward compatibility imposes to disable the write protection at power-up by default. Add a Kconfig option to let the user benefit of the power-up write protection. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/Kconfig | 8 ++++++++ drivers/mtd/spi-nor/spi-nor.c | 2 ++ 2 files changed, 10 insertions(+) diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 6de83277ce8b..b550e10657f1 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -22,6 +22,14 @@ config MTD_SPI_NOR_USE_4K_SECTORS Please note that some tools/drivers/filesystems may not work with 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). +config MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION + bool "Disable write protection during power-up" + default y + help + Some spi-nor flashes are write protected by default after a power-on + reset cycle, in order to avoid inadvertend writes during power-up. + Disable the write protection during power-up. + config SPI_ASPEED_SMC tristate "Aspeed flash controllers in SPI mode" depends on ARCH_ASPEED || COMPILE_TEST diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index ffb53740031c..e5627fa6b1cd 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -4049,6 +4049,7 @@ static int spi_nor_init(struct spi_nor *nor) { int err; +#ifdef CONFIG_MTD_SPI_NOR_DISABLE_POWER_UP_WRITE_PROTECTION /* * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up * with the software protection bits set. @@ -4082,6 +4083,7 @@ static int spi_nor_init(struct spi_nor *nor) return err; } } +#endif if (nor->quad_enable) { err = nor->quad_enable(nor);