diff mbox

[4/4] MTD: OneNAND: S5PC110: Add timeout to prevent the endless loop

Message ID 20100927072517.GA32095@july
State Accepted
Commit ebe8a642f50a0020bed317afcde1f9d2a9da429b
Headers show

Commit Message

Kyungmin Park Sept. 27, 2010, 7:25 a.m. UTC 
From: Kyungmin Park <kyungmin.park@samsung.com>

There's no case timeout but add it for some H/W problem or
wrong codes implementation

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/mtd/onenand/samsung.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

Comments

Artem Bityutskiy Sept. 28, 2010, 6:27 a.m. UTC | #1 
On Mon, 2010-09-27 at 16:25 +0900, Kyungmin Park wrote:
> From: Kyungmin Park <kyungmin.park@samsung.com>
> 
> There's no case timeout but add it for some H/W problem or
> wrong codes implementation
> 
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

I've pushed this patch to l2-mtd-2.6.git, but did not push patches 1-3.
Please, re-send them against the l2 tree.

Also, please note that we use "mtd:" prefix for the MTD patches, not
"MTD:".

Thanks!
diff mbox

Patch

diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 30eccd7..afdb4c5 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -535,6 +535,7 @@  static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 {
 	void __iomem *base = onenand->dma_addr;
 	int status;
+	unsigned long timeout;
 
 	writel(src, base + S5PC110_DMA_SRC_ADDR);
 	writel(dst, base + S5PC110_DMA_DST_ADDR);
@@ -552,6 +553,13 @@  static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 
 	writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
 
+	/*
+	 * There's no exact timeout values at Spec.
+	 * In real case it takes under 1 msec.
+	 * So 20 msecs are enough.
+	 */
+	timeout = jiffies + msecs_to_jiffies(20);
+
 	do {
 		status = readl(base + S5PC110_DMA_TRANS_STATUS);
 		if (status & S5PC110_DMA_TRANS_STATUS_TE) {
@@ -559,7 +567,8 @@  static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 					base + S5PC110_DMA_TRANS_CMD);
 			return -EIO;
 		}
-	} while (!(status & S5PC110_DMA_TRANS_STATUS_TD));
+	} while (!(status & S5PC110_DMA_TRANS_STATUS_TD) &&
+		time_before(jiffies, timeout));
 
 	writel(S5PC110_DMA_TRANS_CMD_TDC, base + S5PC110_DMA_TRANS_CMD);