diff mbox series

[4/5] mtd: rawnand: qcom: update BBT related flags

Message ID 1530863519-5564-5-git-send-email-absahu@codeaurora.org
State Changes Requested
Delegated to: Miquel Raynal
Headers show
Series Update for removing driver specific BBM functions | expand

Commit Message

Abhishek Sahu July 6, 2018, 7:51 a.m. UTC
Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.
Flash based BBT is not used since bootloaders
doesn't have support for the same.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
 drivers/mtd/nand/raw/qcom_nandc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Miquel Raynal July 18, 2018, 9:15 p.m. UTC | #1
Hi Abhishek,

Abhishek Sahu <absahu@codeaurora.org> wrote on Fri,  6 Jul 2018
13:21:58 +0530:

> Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.

Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
the scan of the on-chip BBT and will scan every block to construct a
RAM, based BBT thanks to the BBM.

So flash based BBT is already unused and removing this flag is a
mistake, right?

> Flash based BBT is not used since bootloaders
> doesn't have support for the same.
> 
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---

Thanks,
Miquèl
Boris Brezillon July 18, 2018, 9:36 p.m. UTC | #2
On Wed, 18 Jul 2018 23:15:26 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> Hi Abhishek,
> 
> Abhishek Sahu <absahu@codeaurora.org> wrote on Fri,  6 Jul 2018
> 13:21:58 +0530:
> 
> > Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.  
> 
> Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
> the scan of the on-chip BBT and will scan every block to construct a
> RAM, based BBT thanks to the BBM.
> 
> So flash based BBT is already unused and removing this flag is a
> mistake, right?

->scan_bbt() is also taking care of building the in-RAM BBT based on
BBM when no on-flash BBT is provided, so I think it's the right thing
to do.

> 
> > Flash based BBT is not used since bootloaders
> > doesn't have support for the same.
> > 
> > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> > ---  
> 
> Thanks,
> Miquèl
>
Miquel Raynal July 18, 2018, 9:41 p.m. UTC | #3
Hi Boris,

Boris Brezillon <boris.brezillon@bootlin.com> wrote on Wed, 18 Jul 2018
23:36:37 +0200:

> On Wed, 18 Jul 2018 23:15:26 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Hi Abhishek,
> > 
> > Abhishek Sahu <absahu@codeaurora.org> wrote on Fri,  6 Jul 2018
> > 13:21:58 +0530:
> >   
> > > Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.    
> > 
> > Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
> > the scan of the on-chip BBT and will scan every block to construct a
> > RAM, based BBT thanks to the BBM.
> > 
> > So flash based BBT is already unused and removing this flag is a
> > mistake, right?  
> 
> ->scan_bbt() is also taking care of building the in-RAM BBT based on  
> BBM when no on-flash BBT is provided, so I think it's the right thing
> to do.

Oh right. Then doing so is harmless.

Thanks for the clarification.
Miquèl
Miquel Raynal July 18, 2018, 9:42 p.m. UTC | #4
Abhishek,

Miquel Raynal <miquel.raynal@bootlin.com> wrote on Wed, 18 Jul 2018
23:41:44 +0200:

> Hi Boris,
> 
> Boris Brezillon <boris.brezillon@bootlin.com> wrote on Wed, 18 Jul 2018
> 23:36:37 +0200:
> 
> > On Wed, 18 Jul 2018 23:15:26 +0200
> > Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> >   
> > > Hi Abhishek,
> > > 
> > > Abhishek Sahu <absahu@codeaurora.org> wrote on Fri,  6 Jul 2018
> > > 13:21:58 +0530:
> > >     
> > > > Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.      
> > > 
> > > Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
> > > the scan of the on-chip BBT and will scan every block to construct a
> > > RAM, based BBT thanks to the BBM.
> > > 
> > > So flash based BBT is already unused and removing this flag is a
> > > mistake, right?    
> >   
> > ->scan_bbt() is also taking care of building the in-RAM BBT based on    
> > BBM when no on-flash BBT is provided, so I think it's the right thing
> > to do.  
> 
> Oh right. Then doing so is harmless.

Could you please update the commit log to reflect this aspect?

> 
> Thanks for the clarification.
> Miquèl
Abhishek Sahu July 20, 2018, 7:14 a.m. UTC | #5
On 2018-07-19 03:12, Miquel Raynal wrote:
> Abhishek,
> 
> Miquel Raynal <miquel.raynal@bootlin.com> wrote on Wed, 18 Jul 2018
> 23:41:44 +0200:
> 
>> Hi Boris,
>> 
>> Boris Brezillon <boris.brezillon@bootlin.com> wrote on Wed, 18 Jul 
>> 2018
>> 23:36:37 +0200:
>> 
>> > On Wed, 18 Jul 2018 23:15:26 +0200
>> > Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>> >
>> > > Hi Abhishek,
>> > >
>> > > Abhishek Sahu <absahu@codeaurora.org> wrote on Fri,  6 Jul 2018
>> > > 13:21:58 +0530:
>> > >
>> > > > Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.
>> > >
>> > > Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
>> > > the scan of the on-chip BBT and will scan every block to construct a
>> > > RAM, based BBT thanks to the BBM.
>> > >
>> > > So flash based BBT is already unused and removing this flag is a
>> > > mistake, right?
>> >
>> > ->scan_bbt() is also taking care of building the in-RAM BBT based on
>> > BBM when no on-flash BBT is provided, so I think it's the right thing
>> > to do.
>> 
>> Oh right. Then doing so is harmless.
> 
> Could you please update the commit log to reflect this aspect?
> 

  Thanks Miquel and Boris.
  I will update the commit log.

  Regards,
  Abhishek
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index 9e6b383..6fb85d3 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -2750,8 +2750,7 @@  static int qcom_nand_host_init(struct qcom_nand_controller *nandc,
 	chip->get_features	= nand_get_set_features_notsupp;
 
 	chip->controller = &nandc->controller;
-	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER |
-			 NAND_SKIP_BBTSCAN;
+	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
 
 	/* set up initial status value */
 	host->status = NAND_STATUS_READY | NAND_STATUS_WP;